HX6656 Datasheet, PDF (3/12 Pages) List of Unclassifed Manufacturers – 32K x 8 ROM-SOI

HX6656
RADIATION CHARACTERISTICS
Total Ionizing Radiation Dose
The ROM will meet all stated functional and electrical
specifications over the entire operating temperature range
after the specified total ionizing radiation dose. All electrical
and timing performance parameters will remain within
specifications after rebound at VDD = 5.5 V and T =125°C
extrapolated to ten years of operation. Total dose hardness
is assured by wafer level testing of process monitor transis-
tors and ROM product using 10 keV X-ray and Co60
radiation sources. Transistor gate threshold shift correla-
tions have been made between 10 keV X-rays applied at a
dose rate of 1x10⁵ rad(SiO₂)/min at T = 25°C and gamma
rays (Cobalt 60 source) to ensure that wafer level X-ray
testing is consistent with standard military radiation test
environments.
The ROM will meet any functional or electrical specifica-
tion after exposure to a radiation pulse of ≤50 ns duration
up to 1x10¹¹ rad(Si)/s, when applied under recommended
operating conditions.
Neutron Radiation
The ROM will meet any functional or timing specification
after a total neutron fluence of up to 1x10¹⁴ cm^-2 applied
under recommended operating or storage conditions. This
assumes an equivalent neutron energy of 1 MeV.
Single Event Phenomena
Transient Pulse Ionizing Radiation
The ROM is capable of reading and retaining stored data
during and after exposure to a transient ionizing radiation
pulse of ≤1 µs duration up to 1x10⁹ rad(Si)/s, when applied
under recommended operating conditions. To ensure va-
lidity of all specified performance parameters before, dur-
ing, and after radiation (timing degradation during tran-
sient pulse radiation (timing degradation during transient
pulse radiation is ≤10%), it is suggested that stiffening
capacitance be placed on or near the package VDD and
VSS, with a maximum inductance between the package
(chip) and stiffening capacitance of 0.7 nH per part. If
there are no operate-through requirements, typical circuit
board mounted de-coupling capacitors are recommended.
All storage elements within the ROM are immune to single
event upsets. No access time or other performance deg-
radation will occur for LET 190 MeV/cm/mg².
Latchup
The ROM will not latch up due to any of the above radiation
exposure conditions when applied under recommended
operating conditions. Fabrication with the SIMOX sub-
strate material provides oxide isolation between adjacent
PMOS and NMOS transistors and eliminates any potential
SCR latchup structures. Sufficient transistor body tie con-
nections to the p- and n-channel substrates are made to
ensure no source/drain snapback occurs.
RADIATION HARDNESS RATINGS (1)
Parameter
Total Dose
Transient Dose Rate Upset (3)
Transient Dose Rate Survivability (3)
Neutron Fluence
Limits (2)
≥1x10⁶
≥1x10⁹
≥1x10¹¹
≥1x10¹⁴
Units
rad(SiO₂)
rad(Si)/s
rad(Si)/s
N/cm²
(1) Device will not latch up due to any of the specified radiation exposure conditions.
(2) Operating conditions (unless otherwise specified): VDD=4.5 V to 5.5 V, TA=-55°C to 125°C.
(3) Not guaranteed with 28–Lead DIP.
3
Test Conditions
TA=25°C
Pulse width ≤1 µs
Pulse width ≤50 ns, X-ray,
VDD=6.0 V, TA=25°C
1 MeV equivalent energy,
Unbiased, TA=25°C