HX6656 Datasheet, PDF (2/12 Pages) List of Unclassifed Manufacturers – 32K x 8 ROM-SOI

HX6656
FUNCTIONAL DIAGRAM
A:0-8,12-13
11
CE
NCS
NOE
A:9-11,14
4
Row
Decoder
•
•
•
32,768 x 8
Memory
Array
•••
Column Decoder
Data O utp ut
Q :0-7
8
CS • CE • OE
(0 = high Z)
1 = enab led
Signal _#
Signal
All controls must b e
enab led for a signal to
p ass. (#: numb er of
b uffers, default = 1)
SIGNAL DEFINITIONS
A: 0-14
Q: 0-7
NCS
NOE
CE*
Address input pins which select a particular eight-bit word within the memory array.
Data Output Pins.
Negative chip select, when at a low level allows normal read operation. When at a high level NCS forces the
ROM to a precharge condition, holds the data output drivers in a high impedance state and disables all input
buffers except CE. If this signal is not used it must be connected to VSS.
Negative output enable, when at a high level holds the data output drivers in a high impedance state. When
at a low level, the data output driver state is defined by NCS and CE. If this signal is not used it must be
connected to VSS.
Chip enable, when at a high level allows normal operation. When at a low level CE forces the ROM to a
precharge condition, holds the data output drivers in a high impedance state and disables all the input buffers
except the NCS input buffer. If this signal is not used it must be connected to VDD.
TRUTH TABLE
NCS
L
H
X
CE*
NOE
MODE
Q
H
L
Read
Data Out
X
XX Deselected High Z
L
XX Disabled High Z
*Not Available in 28-lead DIP or 28-Lead Flat Pack
Notes:
X: VI=VIH or VIL
XX: VSS≤VI≤VDD
NOE=H: High Z output state maintained
for NCS=X, CE=X
2