LM3S102 Datasheet, PDF (298/335 Pages) List of Unclassifed Manufacturers – Microcontroller

Analog Comparator
14.3
Figure 14-3. Comparator Internal Reference Structure
AVDD
8R R
R
8R
R
R
•••
EN
VREF
RNG
15 14
•••
1
0
Decoder
internal
reference
Table 14-2. Internal Reference Voltage and ACREFCTL Field Values
ACREFCTL Register
EN Bit Value RNG Bit Value
Output Reference Voltage Based on VREF Field Value
EN=0
EN=1
RNG=X
RNG=0
0 V (GND) for any value of VREF; however, it is recommended that
RNG=1 and VREF=0 for the least noisy ground reference.
Total resistance in ladder is 32 R.
V_REF
=
AV_DD
×
R_{----V----R---E---F-}
R_T
V_REF = AV_DD × ⁽---^V----^R----^E-3---^F-2----+-----8----⁾
RNG=1
V_REF = 0.825 + 0.103 ⋅ VREF
The range of internal reference in this mode is 0.825–2.37 V.
Total resistance in ladder is 24 R.
V_REF
=
AV_DD
×
R_{----V----R---E---F-}
R_T
V_REF = AV_DD × ⁽---^V----^R-2---4^E----^F----⁾
V_REF = 0.1375 ⋅ VREF
The range of internal reference for this mode is 0.0–2.0625 V.
Initialization and Configuration
The following example shows how to configure analog comparator to read back its output value
from an internal register.
1. Enable the analog comparator 0 clock by writing a value of 0x00100000 to the RCGC1 register
in the System Control module.
2. In the GPIO module, enable the GPIO port/pin associated with C0- as a GPIO input.
3. Configure the internal voltage reference to 1.65 V by writing the ACREFCTL register with the
value 0x0000030C.
4. Configure comparator 0 to use the internal voltage reference and to not output a value on the
C0O pin by writing the ACCTL0 register with the value of 0x0000040C.
298
October 6, 2006
Preliminary