LM3S102 Datasheet, PDF (145/335 Pages) List of Unclassifed Manufacturers – Microcontroller

Figure 9-4. 16-Bit PWM Mode Example
Count
GPTMTnR=GPTMnMR
0xC350
LM3S102 Data Sheet
GPTMTnR=GPTMnMR
0x411A
TnEN set
Output
Signal
TnPWML = 0
TnPWML = 1
Time
9.3
9.3.1
Initialization and Configuration
To use the general-purpose timers, the peripheral clock must be enabled by setting the GPTM0 and
GPTM1 bits in the RCGC1 register.
This section shows module initialization and configuration examples for each of the supported
timer modes.
32-Bit One-Shot/Periodic Timer Mode
The GPTM is configured for 32-bit One-Shot and Periodic modes by the following sequence:
1. Ensure the timer is disabled (the TAEN bit in the GPTMCTL register is cleared) before making
any changes.
2. Write the GPTM Configuration Register (GPTMCFG) with a value of 0x0.
3. Set the TAMR field in the GPTM TimerA Mode Register (GPTMTAMR):
a. Write a value of 0x1 for One-Shot mode.
b. Write a value of 0x2 for Periodic mode.
4. Load the start value into the GPTM TimerA Interval Load Register (GPTMTAILR).
5. If interrupts are required, set the TATOIM bit in the GPTM Interrupt Mask Register
(GPTMIMR).
6. Set the TAEN bit in the GPTMCTL register to enable the timer and start counting.
7. Poll the TATORIS bit in the GPTMRIS register or wait for the interrupt to be generated (if
enabled). In both cases, the status flags are cleared by writing a 1 to the TATOCINT bit of the
GPTM Interrupt Clear Register (GPTMICR).
October 6, 2006
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Preliminary