YMF744B Datasheet, PDF (24/60 Pages) List of Unclassifed Manufacturers – DS-1S

YMF744B
b12..............PR4: AC’97 Power Down Control 4
This bit controls the power state of the AC-link in the Primary AC’97.
“0”: Normal
(default)
“1”: Power down
b13..............PR5: AC’97 Power Down Control 5
Setting this bit to “1” disables the internal clock of the Primary AC’97. In case the AC’97 is used with
DS-1S, the master clock is supplied from DS-1S. Therefore, when the clock is stopped completely, set
PR5 bits to “1” firstly, then the CMCD bit should be set to “1” after duration of 20µs or longer.
“0”: Normal
(default)
“1”: Disable
b14..............PR6: AC’97 Power Down Control 6
This bit controls PR6 bit status of the power control register in the Primary AC’97.
b15..............PR7: AC’97 Power Down Control 7
This bit controls PR7 bit status of the power control register in the Primary AC’97.
Respective data set to b[15:8] are correspondingly set into the “Power down Control/Status” register in the
Primary AC’97 via the AC-Link. These are not set into the power down register in the Secondary AC’97.
4C-4Dh: D-DMA Slave Configuration
Read / Write
Default: 0000h
Access Bus Width: 8, 16, 32-bit
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Base Address
EA
TS
CE
b0................CE: Channel Enable
This bit enables the Distributed DMA function.
“0”: Disable Distributed DMA (default)
“1”: Enable Distributed DMA
b[2:1] ..........TS: Transfer Size
These bits indicate the size of the DMA transfer. Since DS-1S supports only 8-bit DMA transfer, the bits
are hardwired to 00b.
b3................EA: Extended Address
DS-1S does not support extended address mode. This bit is hardwired to 0b.
b[15:4] ........Base Address : D-DMA Slave Base Address
These bits indicate the D-DMA slave base address.
February 3, 1999
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