YMF744B Datasheet, PDF (22/60 Pages) List of Unclassifed Manufacturers – DS-1S

YMF744B
48-49h: DS-1S Control
Read / Write
Default: 0001h
Access Bus Width: 8, 16, 32-bit
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 B1 b0
-
-
-
-
-
-
-
-
-
-
-
- ACLS WRST - CRST
b0................CRST: AC’97 Software Reset Signal Control
This bit controls the CRST# signal.
“0”: Inactive (CRST#=High)
“1”: Active (CRST#=Low)
(default)
b2................WRST: AC’97 Warm Reset
This bit places the AC’97 in warm reset condition when the BIT_CLK signal on the AC’97 remains in
inactive state. If this bit is set to “1”, it will automatically return to “0” after 1.3µs time duration. This
bit is valid only while the ACLS bit is set to “0”. Except in this case, even if this bit is attempted to be
set to “1”, no warm reset will be generated (write operation of “1” remains disabled).
“0”: Normal
(default)
“1”: AC’97 Warm Reset
b3................ACLS: AC-Link Status (Read Only)
This bit indicates whether or not the AC-link is active. This bit is “1” when the AC-link remains in
active state (the BIT_CLK signal is active). This bit is “0” during the following conditions:
- When the CRST# pin is active (CRST#=Low)
- When either the PR4 bit or PR5 bit of 4A-4Bh: DS-1S Power Control 1 register is set to “1”
“0”: AC’97 Inactive (default)
“1”: AC’97 Active
February 3, 1999
-22-