MEM4X16E43VTW-5 Datasheet, PDF (23/24 Pages) List of Unclassifed Manufacturers – 4 MEG x 16 EDO DRAM

RAS#
V
V
IH
IL
CASL#/
CASH#
V
V
IH
IL
DQ
V
V
OH
OL
WE#
V
V
IH
IL
4 MEG x 16
EDO DRAM
SELF REFRESH CYCLE
(Addresses and OE# = DON?T CARE)
tRP
tRPC
tCP
tRASS
tCSR
tCHD
tWRP
tWRH
((
))
((
))
((
))
((
))
((
))
OPEN
((
))
((
))
NOTE 1
tRPS
tRPC
tCP
NOTE 2
((
))
tWRP
tWRH
DON?T CARE
UNDEFINED
TIMING PARAMETERS
SYMBOL
t_CHD
t_CLCH
t_CP
t_CSR
t_RASS
-5
MIN
MAX
15
5
8
5
100
-6
MIN
MAX
15
5
10
5
100
UNITS
ns
ns
ns
ns
ns
SYMBOL
t_RP
t_RPC
t_RPS
t_WRH
t_WRP
-5
MIN
MAX
30
5
90
8
8
-6
MIN
MAX
40
5
105
10
10
UNITS
ns
ns
ns
ns
ns
NOTE: 1. Once ^tRASS (MIN) is met and RAS# remains LOW, the DRAM will enter self refresh mode.
2. Once ^tRPS is satisfied, a complete burst of all rows should be executed if RAS#-only or burst CBR refresh is used.
23