QL4016-1PB456M Datasheet, PDF (21/22 Pages) List of Unclassifed Manufacturers – 90,000 Usable PLD Gate QuickRAM Combining Performance, Density and Embedded RAM

Military QuickRAM
RAM Cell Synchronous Write Timing
Symbol
Parameter
1
TSWA
WA Setup Time to WCLK
1.0
THWA
WA Hold Time to WCLK
0.0
TSWD
WD Setup Time to WCLK
1.0
THWD
WD Hold Time to WCLK
0.0
TSWE
WE Setup Time to WCLK
1.0
THWE
WE Hold Time to WCLK
0.0
TWCRD
WCLK to RD (WA=RA) [5]
5.0
Propagation Delays (ns)
Fanout
2
3
4
8
1.0
1.0
1.0
1.0
0.0
0.0
0.0
0.0
1.0
1.0
1.0
1.0
0.0
0.0
0.0
0.0
1.0
1.0
1.0
1.0
0.0
0.0
0.0
0.0
5.3
5.6
5.9
7.1
RAM Cell Synchronous Read Timing
Symbol
Parameter
TSRA
THRA
TSRE
THRE
TRCRD
RA Setup Time to RCLK
RA Hold Time to RCLK
RE Setup Time to RCLK
RE Hold Time to RCLK
RCLK to RD [5]
Propagation Delays (ns)
Fanout
1
2
3
4
8
1.0
1.0
1.0
1.0
1.0
0.0
0.0
0.0
0.0
0.0
1.0
1.0
1.0
1.0
1.0
0.0
0.0
0.0
0.0
0.0
4.0
4.3
4.6
4.9
6.1
RAM Cell Asynchronous Read Timing
Symbol
Parameter
RPDRD
RA to RD [5]
Propagation Delays (ns)
Fanout
1
2
3
4
8
3.0
3.3
3.6
3.9
5.1
Notes:
[5] Stated timing for worst case Propagation Delay over process variation at VCC=3.3V and TA=25°C.
Multiply by the appropriate Delay Factor, K, for speed grade, voltage and temperature settings as
specified in the Operating Range.
Rev A
8-57