ISD5008 Datasheet, PDF (21/47 Pages) List of Unclassifed Manufacturers – SINGLE CHIP VOICE RECORD PLAYBACK DEVICE 4-, 5-, 6-, AND 8- MINUTE DURATIONS

ISD5008 Product
AGC Power Control
Bit
LOW PASS FILTER
Power Control Bit
SAMPLE RATE and
LOW PASS FILTER
Control Bits
FILTER MUX Control
Detail of Configuration Register 1
Bit 0
0 = Power ON
(AGPD)
Bit 1
1 = Power OFF
0 = Power ON
(FLPD)
Bits 3,2
1 = Power OFF
00 = Sample Rate = 8 KHz, FPB = 3.4 KHz
(FLD1, FLD0)
01 = Sample Rate = 6.4 KHz, FPB = 2.7 KHz
10 = Sample Rate = 5.3 KHz, FPB = 2.3 KHz
11 = Sample Rate = 4 KHz, FPB = 1.7 KHz
Bit 4
0 = Source is SUM1 SUMMING AMP (SUM1)
bits
SUM 2 SUMMING AMP
Control Bits
(FLS0)
Bits 6,5
(S2M1, S2M0)
SUM1 SUMMING AMP Bit 8,7
Control Bits
(S1M1, S1M0)
SUM1MUX Control Bits Bit 10,9
(S1S1, S1S0)
VOLUME CONTROL
Control Bits
Bits 13,12,11
(VOL2, VOL1, VOL0)
1 = Source is Analog Memory Array (ARRAY)
00 = Source is both ANA IN AMP and FILT0
01 = Source is ANA IN Input (ANA IN AMP) ONLY
10 = Source is LOW PASS FILTER (FILT0) ONLY
11 = Power Down SUM2 SUMMING AMP
00 = Source is both SUM1 and INP
01 = Source is SUM1 SUMMING AMP (SUM1) ONLY
10 = Source is INPUT MUX (INP) ONLY
11 = Power Down SUM1 SUMMING AMP
00 = Source is ANA IN Input (ANA IN AMP)
01 = Source is Analog Memory Array (ARRAY)
10 = Source is LOW PASS FILTER (FILT0)
11 = UNUSED
000 = Attenuation = 0 dB
001 = Attenuation = 4 dB
010 = Attenuation = 8 dB
VOL MUX Control Bits Bit 15,14 (VLS1, VLS0)
011 = Attenuation = 12 dB
100 = Attenuation = 16 dB
101 = Attenuation = 20 dB
110 = Attenuation = 24 dB
111 = Attenuation = 28 dB
00 = Source is ANA IN Input (ANA IN AMP)
01 = Source is SUM2 SUMMING AMP (SUM2)
10 = Source is SUM1 SUMMING AMP (SUM1)
11 = Source is INPUT MUX (INP)
Configuration Register Notes
1. Important: All changes to the internal settings of the ISD5008 are synchronized with the load of Configuration
Register 1. A command to load Configuration Register 1 immediately transfers the input data to the internal
settings of the device and the changes take place immediately at the end of the command when SS\ goes
HIGH. A load to Configuration Register 0 sends the new data to a temporary register in the ISD5008 and does
not affect the internal settings of the device. The next time Configuration Register 1 is loaded, data will also
transfer from the temporary register to the Configuration 0 Register and effect the desired changes. See Figure
Table 13.
2. Configuration Registers may be loaded with data at any time, including when the chip is powered down using
the PU bit in the SPI Control Register. The PU bit in the SPI Control Word will have to be set to a “1” before the
changes in configuration will be seen.
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