YMF740C Datasheet, PDF (20/44 Pages) List of Unclassifed Manufacturers – DS-1L

YMF740C
b5................PSN: Power Save PCI Audio block
Setting this bit to “1” stops providing the clock with the PCI Audio function block. This block includes
PCI Audio, SRC, AC’97 I/F and H/W Vol.
“0”: Normal
(default)
“1”: Power Save
b8................PR0: AC’97 Power down Control 0
This bit controls the power state of the ADC and Input Mux in AC’97.
“0”: Normal
(default)
“1”: Power down
b9................PR1: AC’97 Power down Control 1
This bit controls the power state of the DAC in AC’97.
“0”: Normal
(default)
“1”: Power down
b10..............PR2: AC’97 Power down Control 2
This bit controls the power state of the Analog Mixer (Vref still on) in AC’97. This power state retains
the Reference Voltage of AC’97.
“0”: Normal
(default)
“1”: Power down
b11..............PR3: AC’97 Power down Control 3
This bit controls the power state of the Analog Mixer (Vref off) in AC’97. This power state removes
Reference Voltage of AC’97.
“0”: Normal
(default)
“1”: Power down
b12..............PR4: AC’97 Power down Control 4
This bit controls the power state of the AC-link in AC’97.
“0”: Normal
(default)
“1”: Power down
b13..............PR5: AC’97 Power down Control 5
Setting this bit to “1” disables the internal clock of AC’97. In case AC’97 is used with DS-1L, the
master clock is supplied from DS-1L. Therefore, when the clock of AC’97 is stopped completely, set
both PR5 and PSN bits to “1”.
“0”: Normal
(default)
“1”: Disable
b[15:14] ......AC’97 Power down Control 6 and 7
These bits control PR6 and PR7 status of the power control register in AC’97.
January 14, 1999
-20-