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S93662 Datasheet, PDF (2/14 Pages) List of Unclassifed Manufacturers – Voltage Monitor and Reset Controller
PIN CONFIGURATION
8-Pin PDIP
or 8-Pin SOIC
CS 1
SK 2
DI 3
DO 4
8 VCC
7 RESET
6 RESET#
5 GND
2012 T PCon 2.0
PIN FUNCTIONS
Pin Name
CS
SK
DI
DO
VCC
GND
RESET/RESET#
Function
Chip Select
Clock Input
Serial Data Input
Serial Data Output
+2.7 to 6.0V Power Supply
Ground
RESET I/O
DEVICE OPERATION
APPLICATIONS
The S93662/663 is ideal for applications requiring low
voltage and low power consumption. This device pro-
vides microcontroller RESET control and can be manu-
ally resettable.
RESET CONTROLLER DESCRIPTION
The S93662/663 provides a precision reset controller
that ensures correct system operation during brownout
and power-up/-down conditions. It is configured with two
open drain reset outputs; pin 7 is an active high output
and pin 6 is an active low output.
During power-up, the reset outputs remain active until
VCC reaches the VTRIP threshold. The outputs will con-
tinue to be driven for approximately 200ms after reach-
S93662/S93663
ing VTRIP. The reset outputs will be valid so long as VCC
is ≥1.0V. During power-down, the reset outputs will begin
driving active when VCC falls below VTRIP.
The reset pins are I/Os; therefore, the S93662/663 can
act as a stabilization circuit for an externally applied
reset. The inputs are edge triggered; that is, the RESET
input will initiate a reset time-out after detecting a low to
high transition and the RESET# input will initiate a reset
time-out after detecting a high to low transition. Refer to
the applications Information section for more details on
device operation as a debounce/reset extender circuit.
It should be noted the reset outputs are open drain.
When used as outputs driving a circuit they need to be
either tied high (RESET#) or tied to ground (RESET)
through the use of pull-up or pull-down resistors. Refer to
the applications aid section for help in determining the
value of resistor to be used. Internally these pins are
weakly pulled up (RESET#) and pulled down (RESET):
therefore, if the signals are not being used the pins may
be left unconnected.
GENERAL OPERATION
The S93662/663 is a 4096-bit nonvolatile memory in-
tended for use with industry standard microprocessors.
The S93663 is organized as X16, seven 11-bit instruc-
tions control the reading, writing and erase operations of
the device. The S93662 is organized as X8, seven 12-
bit instructions control the reading, writing and erase
operations of the device. The device operates on a
single 3V or 5V supply and will generate on chip, the high
voltage required during any write operation.
Instructions, addresses, and write data are clocked into
the DI pin on the rising edge of the clock (SK). The DO
pin is normally in a high impedance state except when
reading data from the device, or when checking the
ready/busy status after a write operation.
The ready/busy status can be determined after the start
of a write operation by selecting the device (CS high) and
polling the DO pin; DO low indicates that the write
operation is not completed, while DO high indicates that
the device is ready for the next instruction. See the
Applications Aid section for detailed use of the ready
busy status.
The format for all instructions is: one start bit; two op code
bits and either eight (x16) or nine (x8) address or instruc-
tion bits.
2012 2.0 4/18/00
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