OX9162 Datasheet, PDF (2/41 Pages) List of Unclassifed Manufacturers – Integrated Parallel Port/Local Bus and PCI interface

OXFORD SEMICONDUCTOR LTD.
CONTENTS
1 PIN INFORMATION...................................3
2 PIN DESCRIPTIONS .................................4
3 CONFIGURATION & OPERATION............8
4 PCI TARGET CONTROLLER....................9
4.1 OPERATION............................................................9
4.2 CONFIGURATION SPACE ....................................9
4.2.1 PCI CONFIGURATION SPACE REGISTER
MAP 10
4.3 ACCESSING LOGICAL FUNCTIONS.................11
4.3.1 PCI ACCESS TO 8-BIT LOCAL BUS ..............11
4.3.2 PCI ACCESS TO PARALLEL PORT ...............11
4.4 ACCESSING LOCAL CONFIGURATION
REGISTERS ........................................................................12
4.4.1 LOCAL CONFIGURATION AND CONTROL
REGISTER ‘LCC’ (OFFSET 0X00) ....................................12
4.4.2 MULTI-PURPOSE I/O CONFIGURATION
REGISTER ‘MIC’ (OFFSET 0X04).....................................13
4.4.3 LOCAL BUS TIMING PARAMETER REGISTER
1 ‘LT1’ (OFFSET 0X08): .....................................................13
4.4.4 LOCAL BUS TIMING PARAMETER/BAR
SIZING REGISTER 2 ‘LT2’ (OFFSET 0X0C):...................15
4.4.5 GLOBAL INTERRUPT STATUS AND
CONTROL REGISTER ‘GIS’ (OFFSET 0X10).................16
4.5 PCI INTERRUPTS.................................................17
4.6 POWER MANAGEMENT......................................18
4.6.1 POWER MANAGEMENT USING MIO ............18
5 LOCAL BUS ........................................... 19
5.1 OVERVIEW............................................................19
5.2 OPERATION..........................................................19
5.3 CONFIGURATION & PROGRAMMING ..............20
6 BI-DIRECTIONAL PARALLEL PORT...... 21
6.1 OPERATION AND MODE SELECTION..............21
6.1.1 SPP MODE........................................................21
6.1.2 PS2 MODE ........................................................21
6.1.3 EPP MODE........................................................21
6.1.4 ECP MODE........................................................21
6.2 PARALLEL PORT INTERRUPT ..........................21
OX9162
6.3 REGISTER DESCRIPTION.................................. 22
6.3.1 PARALLEL PORT DATA REGISTER ‘PDR’... 22
6.3.2 ECP FIFO ADDRESS / RLE ............................ 22
6.3.3 DEVICE STATUS REGISTER ‘DSR’ .............. 22
6.3.4 DEVICE CONTROL REGISTER ‘DCR’........... 23
6.3.5 EPP ADDRESS REGISTER ‘EPPA’ ............... 23
6.3.6 EPP DATA REGISTERS ‘EPPD1-4’ ............... 23
6.3.7 ECP DATA FIFO............................................... 23
6.3.8 TEST FIFO........................................................ 23
6.3.9 CONFIGURATION A REGISTER.................... 23
6.3.10 CONFIGURATION B REGISTER.................... 24
6.3.11 EXTENDED CONTROL REGISTER ‘ECR’ .... 24
7 SERIAL EEPROM ................................... 25
7.1 SPECIFICATION................................................... 25
7.2 EEPROM DATA ORGANISATION...................... 25
7.2.1 ZONE0: HEADER............................................. 25
7.2.2 ZONE1: LOCAL CONFIGURATION
REGISTERS........................................................................ 27
7.2.3 ZONE2: IDENTIFICATION REGISTERS........ 28
7.2.4 ZONE3: PCI CONFIGURATION REGISTERS28
7.2.5 ZONE4: FUNCTION ACCESS......................... 28
8 OPERATING CONDITIONS..................... 30
9 DC ELECTRICAL CHARACTERISTICS .. 30
9.1 NON-PCI I/O BUFFERS ....................................... 30
9.2 PCI I/O BUFFERS................................................. 31
10 AC ELECTRICAL CHARACTERISTICS
32
10.1 PCI BUS ................................................................ 32
10.2 LOCAL BUS.......................................................... 32
11 TIMING WAVEFORMS ........................ 34
12 ERRATA 1 – IMMEDIATE POWER
DOWN FILTERING......................................... 39
Data Sheet Revision 1.1 PRELIMINARY
Page 2