English
Language : 

HWD2108 Datasheet, PDF (14/18 Pages) List of Unclassifed Manufacturers – Dual 105 mW Headphone Amplifier
Application Information (Continued)
Also, careful consideration must be taken in selecting a
certain type of capacitor to be used in the system. Different
types of capacitors (tantalum, electrolytic, ceramic) have
unique performance characteristics and may affect overall
system performance.
Bypass Capacitor Value
Besides minimizing the input capacitor size, careful consid-
eration should be paid to the value of the bypass capacitor,
CB. Since CB determines how fast the HWD2108 settles to
quiescent operation, its value is critical when minimizing
turn-on pops. The slower the HWD2108’s outputs ramp to their
quiescent DC voltage (nominally 1/2 VDD), the smaller the
turn-on pop. Choosing CB equal to 1.0µF or larger, will
minimize turn-on pops. As discussed above, choosing Ci no
larger than necessary for the desired bandwith helps mini-
mize clicks and pops.
AUDIO POWER AMPLIFIER DESIGN
Design a Dual 70mW/32Ω Audio Amplifier
Given:
Power Output
Load Impedance
Input Level
Input Impedance
Bandwidth
70mW
32Ω
1Vrms (max)
20kΩ
100Hz–20kHz ± 0.50dB
The design begins by specifying the minimum supply voltage
necessary to obtain the specified output power. One way to
find the minimum supply voltage is to use the Output Power
vs Supply Voltage curve in the Typical Performance Char-
acteristics section. Another way, using Equation (5), is to
calculate the peak output voltage necessary to achieve the
desired output power for a given load impedance. To ac-
count for the amplifier’s dropout voltage, two additional volt-
ages, based on the Dropout Voltage vs Supply Voltage in the
Typical Performance Characteristics curves, must be
added to the result obtained by Equation (5). For a
single-ended application, the result is Equation (6).
(5)
VDD ≥ (2VOPEAK + (VODTOP + VODBOT))
(6)
The Output Power vs Supply Voltage graph for a 32Ω load
indicates a minimum supply voltage of 4.8V. This is easily
met by the commonly used 5V supply voltage. The additional
voltage creates the benefit of headroom, allowing the
HWD2108 to produce peak output power in excess of 70mW
without clipping or other audible distortion. The choice of
supply voltage must also not create a situation that violates
maximum power dissipation as explained above in the
Power Dissipation section. Remember that the maximum
power dissipation point from Equation (1) must be multiplied
by two since there are two independent amplifiers inside the
package. Once the power dissipation equations have been
addressed, the required gain can be determined from Equa-
tion (7).
(7)
Thus, a minimum gain of 1.497 allows the HWD2108 to reach
full output swing and maintain low noise and THD+N perfro-
mance. For this example, let AV=1.5.
The amplifiers overall gain is set using the input (Ri ) and
feedback (Rf ) resistors. With the desired input impedance
set at 20kΩ, the feedback resistor is found using Equation
(8).
AV = Rf/Ri
(8)
The value of Rf is 30kΩ.
The last step in this design is setting the amplifier’s −3db
frequency bandwidth. To achieve the desired ±0.25dB pass
band magnitude variation limit, the low frequency response
must extend to at lease one−fifth the lower bandwidth limit
and the high frequency response must extend to at least five
times the upper bandwidth limit. The gain variation for both
response limits is 0.17dB, well within the ±0.25dB desired
limit. The results are an
fL = 100Hz/5 = 20Hz
(9)
and a
fH = 20kHz*5 = 100kHz
(10)
As stated in the External Components section, both Ri in
conjunction with Ci, and Co with RL, create first order high-
pass filters. Thus to obtain the desired low frequency re-
sponse of 100Hz within ±0.5dB, both poles must be taken
into consideration. The combination of two single order filters
at the same frequency forms a second order response. This
results in a signal which is down 0.34dB at five times away
from the single order filter −3dB point. Thus, a frequency of
20Hz is used in the following equations to ensure that the
response is better than 0.5dB down at 100Hz.
Ci ≥ 1 / (2π * 20 kΩ * 20 Hz) = 0.397µF; use 0.39µF.
Co ≥ 1 / (2π * 32Ω * 20 Hz) = 249µF; use 330µF.
The high frequency pole is determined by the product of the
desired high frequency pole, fH, and the closed-loop gain,
AV. With a closed-loop gain of 1.5 and fH = 100kHz, the
resulting GBWP = 150kHz which is much smaller than the
HWD2108’s GBWP of 900kHz. This figure displays that if a
designer has a need to design an amplifier with a higher
gain, the HWD2108 can still be used without running into
bandwidth limitations.
14