PT8R1002 Datasheet, PDF(11/26 Page) List of Unclassifed Manufacturers – CMOS Zero-IF Radio Transceiver IC for Bluetooth

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Preliminary Data Sheet

PT8R1002 CMOS Zero-IF

Radio Transceiver IC for Bluetooth

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Receive operation in Bidirectional interface

Unlikely unidirectional interface, the primary procedure for

data reception is to activate internal RXACTIVE signal by

writing HIGH to RXA field of BT_RF_PLL_CTRL1 through

DBUS interface. The RF circuitry starts to operate and send

data after fixed time from writing data to the field. Right after

writing HIGH to the field, the directional of bus is changed

and PT8R1002 starts to drive TXDATA. Therefore, the

baseband should disable the bus driving before the comple-

tion of register writing in order to prevent bus contention.

Then, the baseband receives data and searches for the access

code. During receive mode, DATACLK is sent from PT8R1002

to baseband as a timing reference. The PT8R1002 circuit sends

the data to baseband at the rising edge of DATACLK, where the

baseband latches the data at the falling edge of DATACLK.

Prior to receiving information over air, the baseband transfers

control information including the hop frequency over the DBUS

interfaces, and enters PT8R1002 into search access code state

after fixed time to turn on receiver circuitry by writing HIGH to

RXA field of BT_RF_PLL_CTRL1. In the search access code

state, the baseband performs all of the tasks required to corre-

late with the access code from the receive data. When the

baseband has correlated the access code, then it drives

SYNCDETECT HIGH and makes PT8R1002 enter into receive

payload state. The bidirectional interface returns to the idle

state by the baseband writing LOW to RXA field of

BT_RF_PLL_CTRL1 to turn off RX circuitry after fixed TRxOff.

Right after writing LOW to the field, the directional of bus is

changed and PT8R1002 disable to drive TXDATA. At that time,

the baseband should enable the bus driving after the comple-

tion of register writing in order to prevent bus floating.

Power-up sequence

Figure 12. Receiver procedure timing-diagram in bidirectional interface

DBUS

Programming

SYNCDETECT

TXDATA

DATACLK

Idle

VCO Tuning

Rx-On

Access Code

HOP CMD RXACTIVE On CMD

Rx-Burst

Rx-

Idle

RXACTIVE Off CMD

In Direction

tTuningRX

Valid Rx Data

Output Direction

tRxOn

tAccessCode

In Direction

tRxOff

Figure 13. Receiver signal timing diagram in bidirectional interface

DATA_CLK(13MHz,O)

DSUB SPI

SYNCDETECT(I)

TXDATA(I/O)

RXACTIVE On

CMD write

tRxOn

RXACTIVE Off

CMD write

PE SYNC WORD TE

PE : Preamble

TE : Trailer

tRxOff

HEADER+PAYLOAD

PT0124(12/04)

Ver:2

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