OZ6912 Datasheet, PDF (11/14 Pages) List of Unclassifed Manufacturers – Single-Slot ACPI CardBus Controller

OZ6912
Pin Name
RESET/
CRST#
Description
Reset: This active high output resets the card.
To prevent reset glitches, this signal is high-
impedance unless a card is seated in the
socket, card power is applied, and the card’s
interface signals are enabled.
BVD2/SPKR#/
LED/CAUDIO
CardBus Reset: In CardBus mode, this pin is
the CRST# output.
Battery Voltage Detect 2 / Speaker / LED: In
Memory mode, this input serves as the BVD2
(battery warning status) input. In I/O mode, this
input can be configured as the card’s SPKR#
audio input or drive-active LED input.
BVD1/
STSCHG#/RI#
/CSTSCHG
CardBus Audio: In CardBus mode, this pin is
the CAUDIO input.
Battery Voltage Detect 1 / Status Change /
Ring Indicate: In Memory mode, this is the
BVD1 (battery-dead status) input. In I/O mode,
this is the STSCHG# input indicating that the
card’s internal status has changed, or the ring
indicates input for wakeup-on-ring system
power management support. See bit 7 of the
Interrupt and General Control register (03h).
VS[2:1]/
CVS[2:1]
CardBus Status Change: In CardBus mode,
this pin is the CSTSCHG. This pin can be used
to generate PME#.
Voltage Sense: These pins are used in
conjunction with CD[2:1] to determine the type
and voltage of a card. These pins are internally
pulled high to AUX_VCC. See Table 1.
SOCKET_VCC
CardBus Voltage Sense: In CardBus mode,
these pins are the CVS[2:1] pins.
Socket Power: These pins are the power rail
input for the socket interface control logic.
These pins can be 0, 3.3, or 5 V,. The socket
interface outputs will operate at the voltage
applied to these pins.
Pin Number
LQFP
BGA
119
B9
134
B5
135
C5
117, 131
D9, C6
90, 126
G13, A7
Input Type
TTL TO
- I-PU
- I-PU
TTL I/O-PU
- PWR
Power
Rail
Socket
_Vcc
Drive
CardBus
spec.
Socket
-
_Vcc
Socket
-
_Vcc
Aux_Vcc CardBus
spec.
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OZ6912-SF-1.5
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