LM3S101 Datasheet, PDF (108/284 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S101 Data Sheet
Register 9: GPIO Interrupt Clear (GPIOICR), offset 0x41C
The GPIOICR register is the interrupt clear register. Writing a 1 to a bit in this register clears the
corresponding interrupt edge detection logic register. Writing a 0 has no effect.
GPIO Interrupt Clear (GPIOICR)
Offset 0x41C
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
IC
Type
RO
RO
RO
RO
RO
RO
RO
RO
W1C
W1C
W1C
W1C
W1C
W1C
W1C
W1C
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit
Name
31:8 reserved
7:0
IC
Type
RO
W1C
Reset
0
0x00
Description
Reserved bits return an indeterminate value, and should never
be changed.
GPIO Interrupt Clear
0: Corresponding interrupt is unaffected.
1: Corresponding interrupt is cleared.
March 22, 2006
108
Preliminary