M13S2561616A Datasheet, PDF (6/48 Pages) Elite Semiconductor Memory Technology Inc. – 4M x 16 Bit x 4 Banks Double Data Rate SDRAM

ESMT
DC Specifications
M13S2561616A
Parameter
Symbol
Test Condition
Version
Unit Note
-4
-5
-6
Operation Current
(One Bank Active)
Operation Current
(One Bank Active)
IDD0
t_RC = t_RC (min) t_CK = t_CK (min)
Active – Precharge
140
130
120 mA
Burst Length = 2 t_RC = t_RC (min), CL=
IDD1 ^{2.5 I}OUT ^{= 0mA, Active-Read-}
190
185
165 mA
Precharge
Precharge Power-down Standby
Current
IDD2P
CKE ≤ V_IL(max), t_CK = t_CK (min), All
banks idle
40
30
25 mA
Idle Standby Current
IDD2N ^{CKE ≥ VIH(min), CS ≥ VIH(min), tCK =} 65
60
55 mA
t_CK (min)
Active Power-down
Current
Standby _IDD3P
All banks ACT, CKE ≤ V_IL(max), t_CK =
t_CK (min)
55
50
45 mA
Active Standby Current
One bank; Active-Precharge, t_RC =
IDD3N t_RAS(max),
100
95
t_CK = t_CK (min)
90 mA
Operation Current (Read)
IDD4R
Burst Length = 2, CL= 2.5 , t_CK = t_CK
(min), I_OUT = 0Ma
300
290
250 mA
Operation Current (Write)
IDD4W
Burst Length = 2, CL= 2.5 , t_CK = t_CK
(min)
300
290
250 mA
Auto Refresh Current
IDD5 t_RC ≥ t_RFC(min)
300
270
250 mA
Self Refresh Current
IDD6 CKE ≤ 0.2V
5
5
5
mA 1
Note 1. Enable on-chip refresh and address counters.
AC Operation Conditions & Timing Specification
AC Operation Conditions
Parameter
Input High (Logic 1) Voltage, DQ, DQS and DM signals
Input Low (Logic 0) Voltage, DQ, DQS and DM signals
Input Different Voltage, CLK and CLK inputs
Input Crossing Point Voltage, CLK and CLK inputs
Symbol
V_IH(AC)
V_IL(AC)
V_ID(AC)
V_IX(AC)
Min
V_REF + 0.31
0.7
Max
V_REF - 0.31
V_DDQ+0.6
0.5*V_DDQ-0.2 0.5*V_DDQ+0.2
Unit
V
V
V
V
Note
1
2
Note1. V_ID is the magnitude of the difference between the input level on CLK and the input on CLK .
2. The value of V_IX is expected to equal 0.5*V_DDQ of the transmitting device and must track variations in the DC level of the
same.
Input / Output Capacitance
(V_DD = 2.3V~2.7V, V_DDQ =2.3V~2.7V, T_A = 25 °C , f = 1MHz)
(V_DD = 2.6V~2.8V, V_DDQ =2.6V~2.8V, T_A = 25 °C , f = 1MHz (only for speed -4))
Parameter
Symbol
Input capacitance
(A0~A11, BA0~BA1, CKE, CS , RAS , CAS , WE )
C_IN1
Min
Max
Unit
2.0
3.0
pF
Input capacitance (CLK, CLK )
Data & DQS input/output capacitance
Input capacitance (DM)
C_IN2
C_OUT
C_IN3
2.0
3.0
pF
4.0
5.0
pF
4.0
5.0
pF
Elite Semiconductor Memory Technology Inc.
Publication Date : Jul. 2007
Revision : 1.3
6/48