F59D4G81A Datasheet, PDF (49/54 Pages) Elite Semiconductor Memory Technology Inc. – Voltage Supply: 1.8V (1.7V ~ 1.95V)

ESMT
F59D4G81A / F59D4G161A
Data Protection & Power Up Sequence
The timing sequence shown in the following figure is necessary for the power-on/off sequence.
The device internal initialization starts after the power supply reaches an appropriate level in the power on sequence. During the
initialization the device R/ B signal indicates the Busy state as shown in the following figure. In this time period, the acceptable
commands are 70h.
The WP signal is useful for protecting against data corruption at power on/off.
AC Waveforms for Power Transition
Elite Semiconductor Memory Technology Inc.
Publication Date: May 2014
Revision: 1.4
49/54