M13S64164A Datasheet, PDF (45/49 Pages) Elite Semiconductor Memory Technology Inc. – 1M x 16 Bit x 4 Banks Double Data Rate SDRAM

ESMT
Preliminary
Power up & Initialization Sequence
M13S64164A
0
1
2
3
4
5
6
7
8
9
10
11 12
13 14 15 16 17
18 19
CLK
CLK
CKE
High level is required
CS
RAS
CAS
WE
BA0
BA1,A9,A11
A10/AP
A8
A7
A1~A6
ADDRESS KEY
A0
High-Z
DQ
DQS
tRP
High-Z
Precharge
EMRS
All Bank DLL Enable
Power & Clock must be
stable for 200us
MRS
DLL Reset
Minimum 200 Cycle
tRP
tRFC
tRFC
Minimum of 2 Ref resh Cycles are required
Precharge
All Bank
1st Auto Refresh
2nd Auto Refresh
Any
Command
Mode Resister Set
: Don't Care
Elite Semiconductor Memory Technology Inc.
Publication Date : Jul. 2007
Revision : 0.3
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