M13S64164A Datasheet, PDF (28/49 Pages) Elite Semiconductor Memory Technology Inc. – 1M x 16 Bit x 4 Banks Double Data Rate SDRAM

ESMT
Preliminary
M13S64164A
Functional Truth Table.
Current
IDLE
CS RAS CAS WE
Address
H X X XX
L H H HX
L H H L BA
L H L X BA, CA, A10
L
L
H
H BA, RA
L
L
H
L BA, A10
L
L
L
HX
L
L
L
L Op-Code Mode-Add
H X X XX
L H H HX
L H H L BA
L H L H BA, CA, A10
ROW ACTIVE _L
H
L
L BA, CA, A10
L
L
H
H BA, RA
L
L
H
L BA, A10
L
L
L
HX
L
L
L
L Op-Code Mode-Add
H X X XX
L H H HX
L H H L BA
Command
DESEL
NOP
Burst Stop
READ / WRITE
Active
PRE / PREA
Refresh
MRS
DESEL
NOP
Burst Stop
READ / READA
WRITE / WRITEA
Active
PRE / PREA
Refresh
MRS
DESEL
NOP
Burst Stop
READ
L H L H BA, CA, A10
READ / READA
L
H
L
L BA, CA, A10
WRITE / WRITEA
L
L
H
H BA, RA
Active
L
L
H
L BA, A10
PRE / PREA
L
L
L
HX
Refresh
L
L
L
L Op-Code Mode-Add MRS
Action
NOP
NOP
ILLEGAL*2
ILLEGAL*2
Bank Active, Latch RA
NOP*4
AUTO-Refresh*5
Mode Register Set*5
NOP
NOP
NOP
Begin Read, Latch CA,
Determine Auto -precharge
Begin Write, Latch CA,
Determine Auto -precharge
Bank Active/ILLEGAL*2
Precharge/Precharge All
ILLEGAL
ILLEGAL
NOP (Continue Burst to END)
NOP (Continue Burst to END)
Terminate Burst
Terminate Burst, Latch CA,
Begin New Read, Determine
Auto-Precharge*3
ILLEGAL
Bank Active/ILLEGAL*2
Terminate Burst, Precharge
ILLEGAL
ILLEGAL
Elite Semiconductor Memory Technology Inc.
Publication Date : Jul. 2007
Revision : 0.3
28/49