M12L32162A Datasheet, PDF (18/29 Pages) Elite Semiconductor Memory Technology Inc. – 1M x 16Bit x 2Banks Synchronous DRAM

ESMT
Preliminary
Read & Write Cycle at Different Bank @ Burst Length = 4
M12L32162A
*Note: 1.tCDL should be met to complete write.
Elite Semiconductor Memory Technology Inc.
Publication Date : Apr. 2007
Revision : 0.3
18/29