M53D256328A-2F Datasheet, PDF (17/47 Pages) Elite Semiconductor Memory Technology Inc. – Internal pipelined double-data-rate architecture, two data

ESMT
M53D256328A (2F)
Read Interrupted by a Read
A Burst Read can be interrupted before completion of the burst by new Read command of any bank. When the previous burst is
interrupted, the remaining addresses are overridden by the new address with the full burst length. The data from the first Read
command continues to appear on the outputs until the CAS latency from the interrupting Read command is satisfied. At this point
the data from the interrupting Read command appears. Read to Read interval is minimum 1 clock.
<Burst Length = 4, CAS Latency = 3>
CLK
CLK
0
1
tCCD(min)
COMMAND READ A
READ B
2
NOP
3
NOP
4
NOP
5
6
NOP
NOP
DQS
DQ's
Hi-Z
Hi-Z
tDQSCK
tRPRE
tRPST
Dout A0 Dout A1 Dout B0 Dout B1 Dout B2 Dout B3
7
NOP
8
NOP
Read Interrupted by a Write & Burst Terminate
To interrupt a burst read with a write command, Burst Terminate command must be asserted to avoid data contention on the I/O
bus by placing the DQ’s(Output drivers) in a high impedance state. To insure the DQ’s are tri-stated one cycle before the beginning
the write operation, Burt Terminate command must be applied at least RU(CL) clocks ï¼»RU means round up to the nearest integerï¼½
before the Write command.
<Burst Length = 4, CAS Latency = 3>
0
1
CLK
CLK
2
3
4
5
6
7
8
COMMAND READ
Burst
Termi nate
DQS
DQ's
NOP
NOP
NOP
tDQSCK
tRPRE
tRPST
tAC
Dout 0 Dout 1
WRITE
NOP
tDQSS
NOP
NOP
tWPRES
tWPST
Din 0 Din 1 Din 2 Din 3
tWPRE
The following functionality establishes how a Write command may interrupt a Read burst.
1. For Write commands interrupting a Read burst, a Burst Terminate command is required to stop the read burst and tristate the
DQ bus prior to valid input write data. Once the Burst Terminate command has been issued, the minimum delay to a Write
command = RU (CL) [CL is the CAS Latency and RU means round up to the nearest integer].
2. It is illegal for a Write and Burst Terminate command to interrupt a Read with auto precharge command.
Elite Semiconductor Memory Technology Inc.
Publication Date :Feb. 2014
Revision : 1.0
17/47