M11B416256A Datasheet, PDF (12/15 Pages) Elite Semiconductor Memory Technology Inc. – 256 K x 16 DRAM EDO PAGE MODE

EliteMT
VIH
RAS _VIL
VIH
CASL,CASH _VIL
I/O
VIH
WE _VIL
CBR REFRESH CYCLE
(A0~A8 ; OE = DON’T CARE)
tRP
tRAS
tRP
tRAS
tRPC
tCP
tCSR
tCHR
tRPC
tCSR
tCHR
tRCH
OPEN
M11B416256A
HIDDEN REFRESH CYCLE
( WE = HIGH ; OE = LOW)
RAS
VIH
VIL
VIH
CASL,CASH _VIL
VIH
ADDR _VIL
VO H
I/O _VOL
VIH
OE _VIL
(READ)
tRAS
tRP
tCRP
tRCD
tRSH
tASR
tRAD
tRAH
tAR
tASC
tRAL
tCAH
ROW
COLUMN
tRAC
tAA
tCAC
tCLZ
OPEN
tO AC
tORD
(REFRESH)
tRAS
tCHR
VALID DATA
NOTE1
tOFF1
tOFF2
OPEN
Note : 1. tOFF1 is reference from the rising edge of RAS or CAS , whichever occurs last.
DON'T CARE
UNDEFINED
Elite Memory Technology Inc
Publication Date : Feb. 2004
Revision : 1.9
12/15