EPC700 Datasheet, PDF (6/11 Pages) Espros Photonics corp – 24V/50mA General-Purpose Output-Driver

epc700/epc702
Application Information
epc700 and epc702 have two modes of operation, where the SENS pin is used to define the mode. When SENS is tied to VDD, the chip
operates as a sink driver capable to sink max. 50mA at 30VDC (refer to Figure 6). The load is connected directly between V L and the OUT pin.
If the current through the internal switch exceeds I , SENS the switch is turned off.
If the SENS pin is at low level, the OUT pin is driven by a source driver also capable to drive 50mA into an external power transistor. This
mode is used if the required output current has to be higher than 50mA, e.g. 1A and the output voltage exceeds 30VDC (refer to Figure 7).
The load current is measured by monitoring the voltage drop over a resistor. If the internal switch is used, also the current measurement
resistor is located internally (Figure 6). In the case of using an external power transistor as shown in Figure 7, the current measurement
resistor RS has to be placed externally. If the voltage drop at RS exceeds the threshold of 200 mV, the output stage is deactivated. The timing
diagrams of the signals can be found in section “Functional Description”.
The IN signal must be low during power-up (tSTARTUP) for proper function of the chip. The epc70x has a built in pull down resistor, so not
external active driving is needed during startup.
epc700 or epc702 Using the Internal Switch
Figure 6 shows the epc700/702 in the mode using the internal switch. To enable this
mode, the SENS pin has to be connected to VDD. Note that the VDD of the chip and
VL at the load can have a different value. The values for both VDD and VL need to be
between 9.6 and 30V.
The factor frt between minimum off-time and delay-time must be maintained in order
not to damage the chip due to overheating. This factor has to be higher than 1,000. In
the worst case scenario a peak current of approx. 0.5A is flowing from VL at 30V into
the chip with a tDel set at 50μs if a short-circuit occurs. If the recovery time tminoff in this
case is smaller then 50ms, the average power dissipation would exceed the safe
operation condition and the device will get damaged.
The diode D1 is to protect the internal switch against voltage surges when inductive
loads are turned off.
R1 is to protect the internal switch in case of a short circuit on the load when a very
low impedance power supply is used.
The voltage VL can be higher than VDD in this configuration. However, it must not be
above the maximum value of 'Supply Voltage' stated in the table Electrical Characte-
ristics.
VDD
V ≤VDD max
L
VDD
epc700
epc702
OUT
IN
STATUS SENSE
GND
D
R
L
L
R1≥50Ω
GND
Figure 6: epc700 or epc702 using the internal switch
to drive a load of up to 50mA /30VDC
epc700 or epc702 Using an External Switching Transistor
Figure
output
7 shows the operation mode using
current/voltage dri^Vv^De^Dcapability. In
athnisexetxe_VarnmL≤a_{Vpl lD}sew_D, ia_mtc_ahb_xiTpo1 _lianr
order to extend the
transistor is used,
whereas the base current is limited by the resistor RB. The maximum base current is
VDD
V
L
50mA. In order not to damage the chip, the user has to select the resistor RB such that
chip does not need to drive more
or an n-channel MOSFET.^VDD
than
50mA.
Othe_Dr poss_Rible
L
L
switches
are
a
NPN
BJT
epc700
The load is turned on aenpdc7o0ff2 by setting the pin IN to high respectively to low level.
When the load is turned on, the_Olo_Ua_Td curre^Rn¹t^≥f⁵l⁰o^Ωws from VL through the resistor RS and
through the transistor T1 to GND. This current creates a voltage drop over RS. The
resulting voltage is^INapplied to pin SENS, which measures the voltage drop. If it
exceeds the threshold of an internal comparator, set to 200mV, the output is turned off
after the given delay^STti^Am^TUe^St del. ^SENSE
If the delay time should be^GNe^Dxtended to a value above the possible settings of tdel (refer
VDD
epc700
epc702
OUT
IN
STATUS SENSE
GND
D
R
L
L
R1
T1
R
T
C
T
R_SENSE
to Table 3), an RC network can added, designated as RT and CT in Figure 7. The
additional time delay text GcNaDn be calculated approx. as
varies according to the current through RS. This design
RT x CT. However, the ^Ftiⁱm^le:e^Unbenannt
concept is especially useful, ^{This document is confidential}
and
protGectNedDby
law
and
international
trades.
It
must
not
be
shown
to
any
third
party
nor
be
copied
in
any
when a large capacitor in the load path needs to be charged. The additional delay in
Figure 7: epc700 or epc702 operation mode
the over-current detection helps in such a situation.
using an external switching transistor.
Note that the VDD of the chip and VL on the load are different in most of the applica-
tions. The value of VDD must be between 9.6 and 30V. VL instead, can be on a level
which is appropriate to the external switching transistor.
In case of a short-circuit in the load the turn-off delay
can be extended by an external RC network.
This network adds text to the internal delay tdel.
The diode D1 is to protect the transistor T1 against voltage surges when inductive loads are turned off.
© 2011 ESPROS Photonics Corporation
6
Characteristics subject to change without notice
Datasheet epc700_702 - V2.2
www.espros.ch
Dieter Kägi
25.05.2011
Page 1