EPC700 Datasheet, PDF (2/11 Pages) Espros Photonics corp – 24V/50mA General-Purpose Output-Driver

epc700/epc702
Absolute Maximum Ratings (Note 1)
Recommended Operating Conditions
Min.
Power Supply Voltage VDD
Maximum Power Dissipation
-0.3 to +36.0 V (Note 2)
Power Supply Voltage (VDD)
9.6
100mW
Storage Temperature Range (TS)
-40°C to +85°C
Lead Temperature solder, 4 sec. (TL) +260°C
Operating Temperature (TO)
-40°
Humidity (non-condensing)
+5
Max.
30
+85°
+95
Units
V
C
%
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Recommended operating conditions indi-
cate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifica -
tions and test conditions, see Electrical Characteristics.
Note 2: Supply voltages up to 36 Volts may be present for 10 seconds only.
Note 3: This device is a highly sensitive CMOS amplifier with an ESD rating of JEDEC HBM class 1C (>1kV). Handling and assembly of this
device should only be done at ESD protected workstations.
Electrical Characteristics
VDD = 9.6V < VDD < 30V, -40°C < TA < +85°C
Symbol
Parameter
Conditions/Comments
Min.
Values
Typ.
Max.
Units
VDD
ΔVDD
IDD
VOUT
VSat
ISENS
VSENS
Supply Voltage
Ripple on Supply Voltage
Supply Current
Output Voltage
Output Saturation Voltage
Sens Current
Current Sens Voltage
Peak-Peak
no load
@50mA output current
Current trigger threshold
Over-current trigger threshold voltage (by using an external
power switch)
9.6
300
0
1
-50
-60
0.18
0.2
30
10
400
30
2
-70
0.25
V
%VDD
μA
V
V
mA
V
IPeak Short Circuit Peak Current Initial current during a short circuit (<1ms, 50Ω series resistor)
VStatus Status Output
Logical high
2
Logical low
-0.3
-0.5
A
5.5
V
0.8
Sink driving capability
-8
-10
-12
mA
fStatus
VIN
Status Output Frequency
Input
epc702 only, duty cycle 50%
Logical high
Logical low
1.5
1.7
2.0
-0.3
1.9
Hz
5.5
0.8
V
Hysteresis
0.25
Pull-down resistance
100
150
200
kΩ
PDIS Power Dissipation
tON Response Time
tOFF Response Time
tdel Off-delay Time
On-chip power dissipation
On
Off
Time between over-current detection and STATUS/OUT
change (default value), refer to section Programming
Programmable off-delay values
100
mW
1.0
1.2
μs
0.7
1.0
μs
40.0
50.0
60.0
μs
5/10/20/50/100/200/500/1,000
tminOFF Recovery Time
Minimum down time of the OUT pin to protect the external
transistor (default value), refer to section Programming
400
500
600
ms
Programmable values
10/20/50/100/200/500/1,000/
1,500
frt
Short circuit recovery delay t /t minoff delay = frt (when used without external driver transistor,
time factor
refer to section “Over-current Reset Sequence”)
1,000
tSTARTUP
CL_max
Start-up time
VDD ramp > 100 V/ms
External Load Capacitance Load capacitance that can be driven through OUT without
triggering over-current @2kOhm load and 5μs delay time
200
μs
30
nF
© 2011 ESPROS Photonics Corporation
2
Characteristics subject to change without notice
Datasheet epc700_702 - V2.2
www.espros.ch