EN25F20_1 Datasheet, PDF (8/33 Pages) Eon Silicon Solution Inc. – 2 Mbit Serial Flash Memory with 4Kbytes Uniform Sector

Table 3. Protected Area Sizes Sector Organization
EN25F20
Status Register
Content
BP2 BP1 BP0
Bit
Bit Bit
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Protect Areas
None
Block 3
Block 2 to 3
All
None
sector 0 to sector 59
sector 0 to sector 61
All
Memory Content
Protect
Addresses
None
030000h-03FFFFh
020000h-03FFFFh
000000h-03FFFFh
None
000000h-03BFFFh
000000h-03DFFFh
000000h-03FFFFh
Protect
Density(KB)
None
64KB
128KB
256KB
None
240KB
248KB
256KB
Protect
Portion
None
Upper 1/4
Upper 1/2
All
None
Lower 30/32
Lower 31/32
All
Hold Function
The Hold (HOLD) signal is used to pause any serial communications with the device without resetting the
clocking sequence. However, taking this signal Low does not terminate any Write Status Register, Program
or Erase cycle that is currently in progress.
To enter the Hold condition, the device must be selected, with Chip Select (CS#) Low. The Hold condition
starts on the falling edge of the Hold (HOLD) signal, provided that this coincides with Serial Clock (CLK)
being Low (as shown in Figure 4.).
The Hold condition ends on the rising edge of the Hold (HOLD) signal, provided that this coincides with
Serial Clock (CLK) being Low.
If the falling edge does not coincide with Serial Clock (CLK) being Low, the Hold condition starts after Serial
Clock (CLK) next goes Low. Similarly, if the rising edge does not coincide with Serial Clock (CLK) being Low,
the Hold condition ends after Serial Clock (CLK) next goes Low. (This is shown in Figure 4.).
During the Hold condition, the Serial Data Output (DO) is high impedance, and Serial Data Input (DI) and
Serial Clock (CLK) are Don’t Care.
Normally, the device is kept selected, with Chip Select (CS#) driven Low, for the whole duration of the Hold
condition. This is to ensure that the state of the internal logic remains unchanged from the moment of
entering the Hold condition.
If Chip Select (CS#) goes High while the device is in the Hold condition, this has the effect of resetting the
internal logic of the device. To restart communication with the device, it is necessary to drive Hold (HOLD)
High, and then to drive Chip Select (CS#) Low. This prevents the device from going back to the Hold
condition.
Figure 4. Hold Condition Waveform
This Data Sheet may be revised by subsequent versions
8
or modifications due to changes in technical specifications.
©2004 Eon Silicon Solution, Inc.,
Rev. E, Issue Date: 2008/12/15
www.eonssi.com