EN25P32 Datasheet, PDF (11/34 Pages) Eon Silicon Solution Inc. – 32 Mbit Uniform Sector, Serial Flash Memory

Table 5. Manufacturer and Device Identification
OP Code
(M7-M0) (ID15-ID0) (ID7-ID0)
ABh
15h
90h
1Ch
15h
9Fh
1Ch
2016h
EN25P32
Write Enable (WREN) (06h)
The Write Enable (WREN) instruction (Figure 5) sets the Write Enable Latch (WEL) bit. The Write Enable
Latch (WEL) bit must be set prior to every Page Program (PP), Sector Erase (SE), Bulk Erase (BE) and
Write Status Register (WRSR) instruction.
The Write Enable (WREN) instruction is entered by driving Chip Select (CS#) Low, sending the instruction
code, and then driving Chip Select (CS#) High.
Write Disable (WRDI) (04h)
The Write Disable instruction (Figure 6) resets the Write Enable Latch (WEL) bit in the Status Register to
a 0 or exit from OTP mode to normal mode. The Write Disable instruction is entered by driving Chip
Select (CS#) low, shifting the instruction code “04h” into the DI pin and then driving Chip Select (CS#)
high. Note that the WEL bit is automatically reset after Power-up and upon completion of the Write Status
Register, Page Program, Sector Erase, and Bulk Erase instructions.
This Data Sheet may be revised by subsequent versions ₁₁ ©2004 Eon Silicon Solution, Inc., www.essi.com.tw
or modifications due to changes in technical specifications.
Rev. C, Issue Date: 2007/10/18