EN25Q128 Datasheet, PDF (1/57 Pages) Eon Silicon Solution Inc. – 128 Megabit Serial Flash Memory with 4Kbyte Uniform Sector

EN25Q128
EN25Q128
128 Megabit Serial Flash Memory with 4Kbyte Uniform Sector
FEATURES
• Single power supply operation
- Full voltage range: 2.7-3.6 volt
• Serial Interface Architecture
- SPI Compatible: Mode 0 and Mode 3
• 128 M-bit Serial Flash
- 128 M-bit/16,384 K-byte/65,536 pages
- 256 bytes per programmable page
• Standard, Dual or Quad SPI
- Standard SPI: CLK, CS#, DI, DO, WP#
- Dual SPI: CLK, CS#, DQ₀, DQ₁, WP#
- Quad SPI: CLK, CS#, DQ₀, DQ₁, DQ₂, DQ₃
• High performance
- 104MHz clock rate for Standard SPI
- 80MHz clock rate for two data bits
- 50MHz clock rate for four data bits
• Low power consumption
- 12 mA typical active current
- 1 μA typical power down current
• Uniform Sector Architecture:
- 4096 sectors of 4-Kbyte
- 256 blocks of 64-Kbyte
- Any sector or block can be erased individually
• Software and Hardware Write Protection:
- Write Protect all or portion of memory via
software
- Enable/Disable protection with WP# pin
• High performance program/erase speed
- Page program time: 0.8ms typical
- Sector erase time: 50ms typical
- Block erase time 200ms typical
- Chip erase time: 45 seconds typical
• Lockable 512 byte OTP security sector
• Minimum 100K endurance cycle
• Package Options
- 8 contact VDFN (5x6mm)
- 8 contact VDFN (6x8mm)
- 16 pins SOP 300mil body width
- 24 balls TFBGA (6x8mm)
- All Pb-free packages are RoHS compliant
• Industrial and Automotive temperature Range
GENERAL DESCRIPTION
The EN25Q128 is a 128 Megabit (16,384K-byte) Serial Flash memory, with advanced write protection
mechanisms. The EN25Q128 supports the standard Serial Peripheral Interface (SPI), and a high
performance Dual output as well as Dual/Quad I/O using SPI pins: Serial Clock, Chip Select, Serial
DQ₀(DI), DQ₁(DO), DQ₂(WP#) and DQ₃(NC). SPI clock frequencies of up to 80MHz are supported
allowing equivalent clock rates of 160MHz (80MHz x 2) for Dual Output when using the Dual Output
Fast Read instructions, and SPI clock frequencies of up to 50MHz are supported allowing equivalent
clock rates of 200MHz (50MHz x 4) for Quad Output when using the Quad Output Fast Read
instructions. The memory can be programmed 1 to 256 bytes at a time, using the Page Program
instruction.
The EN25Q128 is designed to allow either single Sector/Block at a time or full chip erase operation. The
EN25Q128 can be configured to protect part of the memory as the software protected mode. The
device can sustain a minimum of 100K program/erase cycles on each sector or block.
This Data Sheet may be revised by subsequent versions
1
or modifications due to changes in technical specifications.
©2004 Eon Silicon Solution, Inc.,
Rev. J, Issue Date: 2011/09/19
www.eonssi.com