HB54A2569F1 Datasheet, PDF (8/17 Pages) Elpida Memory – 256MB, 512MB Registered DDR SDRAM DIMM

HB54A2569F1, HB54A5129F2
Block Diagram (HB54A2569F1)
RS0
RS
DQS0
RS
DM0/DQS9
8 RS
DQ0 to DQ7
DQS /CS DM
DQ D0
RS
RS
DQS1
DM1/DQS10
EOL
DQ8 to DQ15
DQS2
DQ16 to DQ23
DQS3
DQ24 to DQ31
DQS4
DQ32 to DQ39
DQS5
DQ40 to DQ47
8
8
8
8
8
RS
RS
RS
RS
RS
RS
RS
RS
RS
RS
DQS /CS DM
DQ D1
DQS /CS DM
DQ D2
DQS /CS DM
DQ D3
DQS /CS DM
DQ D4
DQS /CS DM
DQ D5
RS
RS
RS
RS
RS
DM2/DQS11
DM3/DQS12
DM4/DQS13
DM5/DQS14
DQS6
8 RS
DQ48 to DQ55
DQS /CS DM
DQ D6
RS
RS
DQS7
8 RS
DQ56 to DQ63
DQS /CS DM
DQ D7
RS
RS
PDQS8
8 RS
CB0 to CB7
DQS /CS DM
DQ D8
DM6/DQS15
DM7/DQS16
DM8/DQS17
RS
/S0
r _{BA0 to BA1} ^RS
R
E
A0 to A12 ^RS
G
/RAS ^RS
o _{/CAS RS}
I
S
T
CKE0 ^RS
E
RS
R
/WE
PCK
d ^/PCK
/RS0 -> /CS: SDRAMs D0 to D8
RBA0 to RBA1 -> BA0 to BA1: SDRAMs D0 to D8
RA0 to RA12 -> A0 to A12: SDRAMs D0 to D8
/RRAS -> /RAS: SDRAMs D0 to D8
/RCAS -> /CAS: SDRAMs D0 to D8
RCKE0A -> CKE: SDRAMs D0 to D8
/RWE -> /WE: SDRAMs D0 to D8
/RESET
SCL
* D0 to D8: HM5425801
U0: 2k-bits EEPROM
RS: 22Ω
PLL: CDCV857
Register: SSTV16857
Serial PD
SCL
SDA
U0
SDA
VCCQ
VCC
D0 to D8
D0 to D8
A0 A1 A2
VREF
VSS
u VCCID
open
D0 to D8
D0 to D8
CK0, /CK0
PLL*
ct ^{Note: Wire per Clock loading table/Wiring diagrams.}
SA0 SA1 SA2
Notes:
1. The SDA pull-up resistor is required due to
the open-drain/open-collector output.
2. The SCL pull-up resistor is recommended
because of the normal SCL line inacitve
"high" state.
Data Sheet E0091H40 (Ver. 4.0)
8