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MC-458CB642XS Datasheet, PDF (6/14 Pages) Elpida Memory – 8M-WORD BY 64-BIT SYNCHRONOUS DYNAMIC RAM MODULE (SO DIMM)
MC-458CB642XS
DC Characteristics (Recommended Operating Conditions unless otherwise noted)
Parameter
Symbol
Test condition
MIN. MAX. Unit Notes
Operating current
ICC1 Burst length = 1, tRC ≥ tRC (MIN.)
/CAS latency = 2
440 mA 1
/CAS latency = 3
460
Precharge standby current in ICC2P CKE ≤ VIL (MAX.), tCK = 15 ns
4
mA
power down mode
ICC2PS
Precharge standby current in ICC2N
non power down mode
ICC2NS
EActive standby current in
ICC3P
power down mode
ICC3PS
Active standby current in
ICC3N
Onon power down mode
ICC3NS
Operating current
ICC4
L (Burst mode)
CKE ≤ VIL (MAX.), tCK = ∞
CKE ≥ VIH (MIN.), tCK = 15 ns, /CS ≥ VIH (MIN.),
Input signals are changed one time during 30 ns.
CKE ≥ VIH (MIN.), tCK = ∞, Input signals are stable.
CKE ≤ VIL (MAX.), tCK = 15 ns
CKE ≤ VIL (MAX.), tCK = ∞
CKE ≥ VIH (MIN.), tCK = 15 ns, /CS ≥ VIH (MIN.),
Input signals are changed one time during 30 ns.
CKE ≥ VIH (MIN.), tCK = ∞, Input signals are stable.
tCK ≥ tCK (MIN.), IO = 0 mA
/CAS latency = 2
/CAS latency = 3
4
80
mA
32
20
mA
16
120 mA
80
580 mA 2
740
CBR (Auto) refresh current
Self refresh current
P Input leakage current
Output leakage current
High level output voltage
r Low level output voltage
ICC5
tRC ≥ tRC (MIN.)
/CAS latency = 2
/CAS latency = 3
ICC6 CKE ≤ 0.2 V
-**
-**L
II(L) VI = 0 to 3.6 V, All other pins not under test = 0 V
IO(L) DOUT is disabled, VO = 0 to 3.6 V
VOH IO = –4.0 mA
VOL IO = +4.0 mA
–4
–1.5
2.4
920 mA 3
960
8
mA
3.2 mA
+4
µA
+1.5 µA
V
0.4
V
Notes 1. ICC1 depends on output loading and cycle rates. Specified values are obtained with the output open. In
o addition to this, ICC1 is measured on condition that addresses are changed only one time during tCK (MIN.).
2. ICC4 depends on output loading and cycle rates. Specified values are obtained with the output open. In
addition to this, ICC4 is measured on condition that addresses are changed only one time during tCK (MIN.).
duct 3. ICC5 is measured on condition that addresses are changed only one time during tCK (MIN.).
6
Data Sheet E0115N20