HB52F649E1 Datasheet, PDF (4/16 Pages) Elpida Memory – 512 MB Registered SDRAM DIMM 64-Mword × 72-bit, 133 MHz Memory Bus, 1-Bank Module (18 pcs of 64 M × 4 Components) PC133SDRAM

HB52F649E1-75B
Pin No.
36
37
38
39
40
41
42
Pin name
A6
A8
A10 (AP)
BA1
V_CC
V_CC
CK0
Pin No.
78
79
80
81
82
83
84
Pin name
V_SS
CK2
NC
WP
SDA
SCL
V_CC
Pin No.
120
121
122
123
124
125
126
Pin name
A7
A9
BA0
A11
V_CC
CK1
A12
Pin No.
162
163
164
165
166
167
168
Pin name
V_SS
CK3
NC
SA0
SA1
SA2
V_CC
Pin Description
Pin name
A0 to A12
BA0/BA1
DQ0 to DQ63
CB0 to CB7
S0, S2
RE
CE
W
DQMB0 to DQMB7
CK0 to CK3
CKE0
WP
REGE*¹
SDA
SCL
SA0 to SA2
V_CC
V_SS
NC
Note: 1. REGE ≥ V_IH: Register mode.
REGE ≤ V_IL: Buffer mode.
Function
Address input
 Row address A0 to A12
 Column address A0 to A9, A11
Bank select address
Data input/output
Check bit (Data input/output)
Chip select input
Row enable (RAS) input
Column enable (CAS) input
Write enable input
Byte data mask
Clock input
Clock enable input
Write protect for serial PD
Register/Buffer enable
Data input/output for serial PD
Clock input for serial PD
Serial address input
Primary positive power supply
Ground
No connection
Data Sheet E0021H10
4