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EDE5104GASA Datasheet, PDF (34/45 Pages) Elpida Memory – 512M bits DDR-II SDRAM
EDE5104GASA, EDE5108GASA
Precharge Command [PRE]
The precharge command is used to precharge or close a bank that has been activated. The precharge command is
triggered when /CS, /RAS and /WE are low and /CAS is high at the rising edge of the clock. The precharge
command can be used to precharge each bank independently or all banks simultaneously. Three address bits A10,
BA0 and BA1 are used to define which bank to precharge when the command is issued.
[Bank Selection for Precharge by Address Bits]
A10
BA0
BA1
L
L
L
L
H
L
L
L
H
EL
H
H
H
×
×
Remark: H: VIH, L: VIL, ×: VIH or VIL
Precharged Bank(s)
Bank 0 only
Bank 1 only
Bank 2 only
Bank 3 only
All banks 0 to 3
OBurst Read Operation Followed by Precharge
Minimum read to precharge command spacing to the same bank = AL + 2 clocks
For the earliest possible precharge, the precharge command may be issued on the rising edge that is
“Additive latency (AL) + 2 clocks” after a Read command. A new bank active (command) may be issued to the same
L bank after the RAS precharge time (tRP). A precharge command cannot be issued until tRAS is satisfied.
/CK
CK
Command
DQS, /DQS
DQ
/CK
CK
Command
DQS, /DQS
DQ
T0
T1
T2
T3
T4
T5
T6
T7
T8
Posted
READ
NOP
NOP
AL + 2 clocks
PRE
NOP
NOP
NOP
ACT
NOP
Pr AL = 1
RL = 4
CL = 3
=> tRAS
=> tRP
out0 out1 out2 out3
CL = 3
o Burst Read Operation Followed by Precharge (RL = 4 (AL=1, CL=3))
d T0
T1
T2
T3
T4
T5
T6
T7
T8
Posted
u READ
NOP
NOP
AL + 2 clocks
NOP
PRE
NOP
NOP
ACT
NOP
ct AL = 2
RL = 5
CL = 3
=> tRP
out0 out1 out2 out3
=> tRAS
CL = 3
Burst Read Operation Followed by Precharge (RL = 5 (AL=2, CL=3))
Preliminary Data Sheet E0203E41 (Ver. 4.1)
34