HB54R1G9F2-B75B Datasheet, PDF (12/16 Pages) Elpida Memory – 1GB Registered DDR SDRAM DIMM

HB54R1G9F2-B75B/10B
DC Characteristics 1 (TA = 0 to +70°C, VCC, VCCQ = 2.5V ± 0.2V, VSS = 0V)
Parameter
Symbol Grade
max.
Unit Test condition
Notes
Operating current (ACTV-PRE) ICC0
-B75B
-10B
2928
2559
mA CKE ≥ VIH, tRC = min. 1, 2, 5
Operating current (ACTV-READ-
PRE)
ICC1
-B75B
-10B
3828
3459
mA
CKE ≥ VIH, BL = 2,
CL = 3.5, tRC = min.
1, 2, 5
Idle power down standby current ICC2P
-B75B
-10B
948
831
mA CKE ≤ VIL
Idle standby current
ICC2N
-B75B
-10B
1668
1479
mA CKE ≥ VIH, /CS ≥ VIH
Active power down standby
current
ICC3P
-B75B
-10B
1128
939
mA CKE ≤ VIL
E^{Active standby current}
ICC3N
-B75B
-10B
2028
1839
mA
CKE ≥ VIH, /CS ≥ VIH
tRAS = max.
Operating current
(Burst read operation)
ICC4R
-B75B
-10B
5088
4809
mA
CKE ≥ VIH, BL = 2,
CL = 3.5
Operating current
(Burst write operation)
ICC4W
-B75B
-10B
4728
4449
mA
CKE ≥ VIH, BL = 2,
CL = 3.5
O_{Auto refresh current}
ICC5
-B75B
-10B
4818
4359
mA
tRFC = min.,
Input ≤ VIL or ≥ VIH
Self refresh current
ICC6
-B75B
-10B
516
507
mA
Input ≥ VCC – 0.2V
Input ≤ 0.2V.
L ^{Notes. 1. These ICC data are measured under condition that DQ pins are not connected.}
4
4
3
3
1, 2, 5, 6
1, 2, 5, 6
2. One bank operation.
3. One bank active.
4. All banks idle.
5. Command/Address transition once per one cycle.
6. Data/Data mask transition twice per one cycle.
7. The ICC data on this table are measured with regard to tCK = min. in general.
P _{DC Characteristics 2 (TA = 0 to +70°C, VCC, VCCQ = 2.5V ± 0.2V, VSS = 0V)}
Parameter
Symbol
min.
Input leakage current
ILI
–10
r _{Output leakage current}
ILO
–10
Output high voltage
VOH
1.95
o _{Output low voltage}
VOL
—
duct ^{Note: 1. DDR SDRAM component specification.}
max.
10
10
—
0.35
Unit
Test condition
µA
VCC ≥ VIN ≥ VSS
µA
VCC ≥ VOUT ≥ VSS
V
IOH (max.) = –15.2mA
V
IOL (min.) = 15.2mA
Notes
1
1
Data Sheet E0089H50 (Ver. 5.0)
12