GD25LQ40 Datasheet, PDF (49/59 Pages) ELM Electronics – 1.8V Uniform Sector Dual and Quad Serial Flash

GD25LQ40xIGx 1.8V Uniform Sector Dual and Quad Serial Flash
7.35. Enable Reset (66H) and Reset (99H)
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If the Reset command is accepted, any on-going internal operation will be terminated and the device will return
to its default power-on state and lose all the current volatile settings, such as Volatile Status Register bits, Write
Enable Latch status (WEL), Program/Erase Suspend status, Read Parameter setting (P7-P0), Continuous Read
Mode bit setting (M7-M0) and Wrap Bit Setting (W6-W4).
The “Enable Reset (66H)” and the “Reset (99H)” commands can be issued in either SPI or QPI mode. The “Reset
(99H)”command sequence as follow: CS# goes low → Sending Enable Reset command → CS# goes high
→ CS# goes low → Sending Reset command → CS# goes high. Once the Reset command is accepted by the
device, the device will take approximately tRST=30µs to reset. During this period, no command will be accepted.
Data corruption may happen if there is an on-going or suspended internal Erase or Program operation when
Reset command sequence is accepted by the device. It is recommended to check the BUSY bit and the SUS bit
in Status Register before issuing the Reset command sequence.
Figu_Fr_ie_gu3_r7_e.₃E_8.n_Ea_nb_al_be_leR_Re_es_se_et_ta_an_nd_d R_Ree_ss_ee_tt_cc_oo_mm_mm_ana_dnd_SeS_qe_uq_enu_ce_enc_De_iaD_gri_aa_mgram
7.34. Read_FiS_gue_rr_eia₃l_7aF_.l_Ea_ns_ah_blD_e i_Rs_ec_so_etv_ae_nr_da_Rb_ele_seP_{t c}a_or_ma_mm_ae_nt_de_Sr _e(_q5_uA_enH_c)_{e Diagram (QPI)}
CS#
SCLK
IO₀
IO₁
IO₂
IO₃
01
Command
66H
01
Command
99H
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Rev.1.0