ZABG4002 Datasheet, PDF (5/7 Pages) Diodes Incorporated – LOW POWER 4 STAGE FET LNA BIAS CONTROLLER

Applications Circuit
L*
C*
JF1
L*
C*
C1
10nF
C2
10nF
* Stripline Elements
A Product Line of
Diodes Incorporated
ZABG4002
Vcc
D2
G3
G2
D4
Vcc
ZABG4002
G4
Gnd
Rcal1
CNB
47nF
CSUB
47nF
RCAL2
39k
RCAL1
39k
Applications Information
Above is a partial applications circuit for the ZABG4002 showing all external components needed for biasing one of the four FET
stages available. Each bias stage is provided with a gate and drain pin. The drain pin provides a regulated 2.0V supply that
includes a drain current monitor. The drain current taken by the external FET is compared with a user selected level, generating a
signal that adjusts the gate voltage of the FET to obtain the required drain current. If for any reason, an attempt is made to draw
more than the user set drain current from the drain pin, the drain voltage will be reduced to ensure excess current is not taken.
The gate pin drivers are also current limited.
The bias stages are split up into two pairs, with the drain current of each pair set by an external R_CAL resistor. R_CAL1 sets the drain
currents of stages 1 and 3, whilst R_CAL2 sets the drain currents of stages 2 and 4. This allows the optimisation of drain currents for
differing tasks such as input stages where noise can be critical and later amplifier stages where gain may be more important. A
graph showing the relationship between the value of R_CAL and I_D is provided in the Typical Characteristics section of this
datasheet. The R_CAL pins can also be used as logic inputs. If set to a logic high state (>3.0V), the associated FET bias stages are
disabled, driving gate pins to -2.5V and switching drain pins open-circuit. This feature can be used as part of a power
management system that turns off any unwanted stages in a multi input receiver.
The ZABG4002 includes a switched capacitor DC-DC converter that is used to generate the negative supply required to bias
depletion mode FETs used in common source circuit configuration as shown above. This converter uses two external capacitors,
C_NB the charge transfer capacitor and C_SUB the output reservoir capacitor. The circuit provides a regulated -2.5V supply both for
gate driver use and for external use if required (for extra discrete bias stages, mixer bias, local oscillator bias etc.). The -2.5V
supply is available from the C_SUB pin.
If any bias stages are not required, their gate and drain pins may be left open circuit. If all bias stages associated with an R_CAL
resistor are not required, then this resistor may be omitted.
To ease PCB layout, the pinout for the ZABG4002 includes two Vcc pins. These pins are internally connected so only one of the
pins needs to be powered for the device to function. It is probable that the extra pin will help avoid the need for trace cross-over
components or ground plane disruption from reverse side PCB links. Note that the exposed pad of the package must be either left
floating or connected to Csub.
ZABG4002
Document number: DS32047 Rev. 2 - 2
5 of 7
www.diodes.com
February 2010
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