ZABG4002 Datasheet, PDF (2/7 Pages) Diodes Incorporated – LOW POWER 4 STAGE FET LNA BIAS CONTROLLER

Device Description
The ZABG series of devices are designed to meet the bias
requirements of GaAs and HEMT FETs commonly used in
satellite receiver LNBs with a minimum of external
components whilst operating from a minimal voltage supply
and using minimal current.
The ZABG4002 provides four FET bias stages, arranged in
two pairs of two. Resistors connected to pins Rcal1 and
Rcal2 set the FET drain currents of each pair over the range
of 0 to 15mA, allowing input FETs to be biased for optimum
noise and amplifier FETs for optimum gain.
Drain voltages of all stages are set at 2.0V. The drain
supplies are current limited to approximately 5% above the
operating currents set by the Rcal resistors.
As an additional feature the Rcal pins can also be used as
logic inputs to disable pairs of FETs as part of a power
management scheme or simply an alternative to LNA
switching. Driven to a logic high (>3.0V), the inputs disable
their associated FET bias stages by switching gate feeds to -
2.5V and drain feeds open circuit.
Depletion mode FETs require a negative voltage bias supply
when operated in grounded source circuits. The ZABG4002
includes an integrated low noise switched capacitor DC-DC
converter generating a regulated output of -2.5V to allow
single supply operation.
A Product Line of
Diodes Incorporated
ZABG4002
To facilitate the design of efficient low voltage 3.3V LNB
systems and to maintain compatibility with higher voltage
legacy designs, the ZABG4002 is capable of operating within
the supply of 3.0V to 8V.
These devices are unconditionally stable over the full working
temperature with the FETs in place, subject to the inclusion of
the recommended gate and drain capacitors. These ensure
RF stability and minimal injected noise.
It is possible to use less than the devices full complement of
FET bias controls, unused drain and gate connections can be
left open circuit without affecting operation of the remaining
bias circuits.
To protect the external FETs the circuits have been designed
to ensure that, under any conditions including power up/down
transients, the gate drive from the bias circuits cannot exceed
-3V. Additionally each stage has its own individual current
limiter. Furthermore if the negative rail experiences a fault
condition, such as overload or short circuit, the drain supply to
the FETs will shut down avoiding excessive current flow.
To minimise PCB space ZABG4002 is packaged in the 16 pin
3mm x 3mm QFN package.
Device operating temperature is -40°C to 85°C to suit a wide
range of environmental conditions.
ZABG4002
Document number: DS32047 Rev. 2 - 2
2 of 7
www.diodes.com
February 2010
© Diodes Incorporated