DMN65D8L-7 Datasheet, PDF (2/6 Pages) Diodes Incorporated – N-CHANNEL ENHANCEMENT MODE MOSFET

DMN65D8L
Maximum Ratings (@T_A = +25°C, unless otherwise specified.)
Drain-Source Voltage
Gate-Source Voltage
Characteristic
Continuous Drain Current (Note 6) V_GS = 10V
Continuous Drain Current (Note 6) V_GS = 5V
Pulsed Drain Current (10µs pulse, duty cycle = 1%)
Maximum Body Diode Continuous Current (Note 5)
Steady
State
Steady
State
T_A = +25°C
T_A = +70°C
T_A = +25°C
T_A = +70°C
Symbol
V_DSS
V_GSS
I_D
I_D
I_DM
I_S
Value
60
±20
310
240
270
210
800
500
Units
V
V
mA
mA
mA
mA
Thermal Characteristics
Total Power Dissipation
Characteristic
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Case
Operating and Storage Temperature Range
(Note 6)
(Note 5)
(Note 6)
(Note 5)
(Note 5)
Symbol
P_D
R_θJA
R_θJC
T_J, T_STG
Value
370
540
348
241
91
-55 to +150
Units
mW
°C/W
°C
Electrical Characteristics (@T_A = +25°C, unless otherwise specified.)
Characteristic
OFF CHARACTERISTICS (Note 7)
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate-Body Leakage
ON CHARACTERISTICS (Note 7)
Gate Threshold Voltage
Static Drain-Source On-Resistance
Forward Transconductance
Diode Forward Voltage
DYNAMIC CHARACTERISTICS (Note 8)
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Total Gate Charge V_GS = 10V
Total Gate Charge V_GS = 4.5V
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Symbol Min Typ Max
BV_DSS
60
⎯
⎯
I_DSS
⎯
⎯
1.0
I_GSS
⎯
⎯
±5
V_GS(th)
1.2
⎯
2.0
⎯
2
3
R_{DS (ON)}
⎯
2.5
4
g_FS
80 290 ⎯
V_SD
⎯ 0.8 1.2
C_iss
C_oss
C_rss
R_G
Q_g
Q_g
Q_gs
Q_gd
t_D(on)
t_r
t_D(off)
t_f
⎯ 22.0 ⎯
⎯
3.2
⎯
⎯
2.0
⎯
⎯ 79.9 ⎯
⎯ 0.87 ⎯
⎯ 0.43 ⎯
⎯ 0.11 ⎯
⎯ 0.11 ⎯
⎯
2.7
⎯
⎯
2.8
⎯
⎯ 12.6 ⎯
⎯
7.3
⎯
Notes:
5. Device mounted on FR-4 substrate PC board, 2oz copper, with 1inch square copper pad layout
6. Device mounted on FR-4 PC board, with minimum recommended pad layout, single sided.
7 .Short duration pulse test used to minimize self-heating effect.
8. Guaranteed by design. Not subject to production testing
Unit
Test Condition
V V_GS = 0V, I_D = 250µA
µA V_DS = 60V, V_GS = 0V
µA V_GS = ±20V, V_DS = 0V
V V_DS = V_GS, I_D = 250µA
Ω V_GS = 10V, I_D = 0.115A
Ω V_GS = 5V, I_D = 0.115A
mS V_DS = 10V, I_D = 0.115A
V V_GS = 0V, I_S = 115mA
pF V_DS = 25V, V_GS = 0V, f = 1.0MHz
Ω V_DS = 0V, V_GS = 0V, f = 1.0MHz
nC ^{VGS = 10V, VDS = 30V,}
I_D = 150mA
nS
V_DD = 30V, I_D = 0.115A, V_GEN = 10V_,
R_GEN = 25Ω
.
DMN65D8L
Document number: DS35923 Rev. 2 - 2
2 of 6
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August 2012
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