DA14583_16 Datasheet, PDF (106/150 Pages) Dialog Semiconductor – Bluetooth Low Energy 4.2 SoC with Flash Memory

DA14583
Bluetooth Low Energy 4.2 SoC with Flash Memory
Table 156: I2C_STATUS_REG (0x50001370)
Bit
Mode Symbol
0
r
I2C_ACTIVITY
Description
I2C Activity Status.
FINAL
Reset
0x0
Table 157: I2C_TXFLR_REG (0x50001374)
Bit
Mode Symbol
15:6 -
-
5:0
r
TXFLR
Description
Reserved
Transmit FIFO Level. Contains the number of valid data
entries in the transmit FIFO. Size is constrained by the
TXFLR value
Reset
0x0
0x0
Table 158: I2C_RXFLR_REG (0x50001378)
Bit
Mode Symbol
15:6 -
-
5:0
r
RXFLR
Description
Reserved
Receive FIFO Level. Contains the number of valid data
entries in the receive FIFO. Size is constrained by the
RXFLR value
Reset
0x0
0x0
Table 159: I2C_SDA_HOLD_REG (0x5000137C)
Bit
Mode Symbol
15:0 r/w
IC_SDA_HOLD
Description
SDA Hold time
Reset
0x1
Table 160: I2C_TX_ABRT_SOURCE_REG (0x50001380)
Bit
Mode Symbol
Description
15
r
ABRT_SLVRD_INTX
1: When the processor side responds to a slave mode
request for data to be transmitted to a remote master and
user writes a 1 in CMD (bit 8) of 2IC_DATA_CMD register
14
r
ABRT_SLV_ARBLOS
T
1: Slave lost the bus while transmitting data to a remote
master.
I2C_TX_ABRT_SOURCE[12] is set at the same time. Note:
Even though the slave never "owns" the bus, something
could go wrong on the bus. This is a fail safe check. For
instance, during a data transmission at the low-to-high tran-
sition of SCL, if what is on the data bus is not what is sup-
posed to be transmitted, then the controller no longer own
the bus.
13
r
ABRT_SLVFLUSH_T
XFIFO
1: Slave has received a read command and some data
exists in the TX FIFO so the slave issues a TX_ABRT inter-
rupt to flush old data in TX FIFO.
12
r
ARB_LOST
1: Master has lost arbitration, or if
I2C_TX_ABRT_SOURCE[14] is also set, then the slave
transmitter has lost arbitration. Note: I2C can be both master
and slave at the same time.
11
r
ABRT_MASTER_DIS 1: User tries to initiate a Master operation with the Master
mode disabled.
10
r
ABRT_10B_RD_NO
RSTRT
1: The restart is disabled (IC_RESTART_EN bit
(I2C_CON[5]) = 0) and the master sends a read command in
10-bit addressing mode.
Reset
0x0
0x0
0x0
0x0
0x0
0x0
Datasheet
CFR0011-120-01
Revision 3.0
106 of 150
04-Nov-2016
© 2014 Dialog Semiconductor