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DA14583_16 Datasheet, PDF (1/150 Pages) Dialog Semiconductor – Bluetooth Low Energy 4.2 SoC with Flash Memory
DA14583
Bluetooth Low Energy 4.2 SoC with Flash Memory
FINAL
General Description
 AES-128 bit encryption Processor
The DA14583 integrated circuit has a fully integrated
radio transceiver and baseband processor for Blue-
tooth® low energy. It can be used as a standalone
application processor or as a data pump in hosted sys-
tems.
 Memories
 1 Mbit Flash memory
 32 kB One-Time-Programmable (OTP) memory
 42 kB System SRAM
 84 kB ROM
 8 kB Retention SRAM
The DA14583 supports a flexible memory architecture,
 Power management
including 1 Mbit of Flash memory, for storing Bluetooth
 Integrated Buck mode DC-DC converter
profiles and custom application code, which can be
 Embedded charge pump for Flash programming
updated over the air (OTA). The qualified Bluetooth low
 P0, P1, and P2 ports with 3.3 V tolerance
energy protocol stack is stored in a dedicated ROM. All
software runs on the ARM® Cortex®-M0 processor via
 Supports coin (typ. 3.0 V) battery cells
 10-bit ADC for battery voltage measurement
a simple scheduler.
 Digital controlled oscillators
The Bluetooth low energy firmware includes the
L2CAP service layer protocols, Security Manager
(SM), Attribute Protocol (ATT), the Generic Attribute
Profile (GATT) and the Generic Access Profile (GAP).
All profiles published by the Bluetooth SIG as well as
custom profiles are supported.
 16 MHz crystal (±20 ppm max) and RC oscillator
 32 kHz crystal (±50 ppm, ±500 ppm max) and
RCX oscillator
 General purpose, Capture and Sleep timers
 Digital interfaces
 24 general purpose I/Os
 2 UARTs with hardware flow control up to 1 MBd
The transceiver interfaces directly to the antenna and
 SPI+™ interface
is fully compliant with the Bluetooth 4.2 standard.
 I2C bus at 100 kHz, 400 kHz
The DA14583 has dedicated hardware for the Link
Layer implementation of Bluetooth low energy and
interface controllers for enhanced connectivity capabili-
ties.
 3-axes capable Quadrature Decoder
 Analog interfaces
 4-channel 10-bit ADC
 Radio transceiver
 Fully integrated 2.4 GHz CMOS transceiver
Features
 Single wire antenna: no RF matching or RX/TX
switching required
 Complies with Bluetooth V4.2, ETSI EN 300 328 and
 Supply current at VBAT3V:
EN 300 440 Class 2 (Europe), FCC CFR47 Part 15
TX: 3.4 mA, RX: 3.7 mA (with ideal DC-DC)
(US) and ARIB STD-T66 (Japan)
 0 dBm transmit output power
 Processing power
 -20 dBm output power in “Near Field Mode”
 16 MHz 32 bit ARM Cortex-M0 with SWD inter-
 -93 dBm receiver sensitivity
face
 Packages:
 Dedicated Link Layer Processor
 QFN 40 pins, 5 mm x 5 mm
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System Diagram
Datasheet
CFR0011-120-01
Revision 3.0
1 of 150
04-Nov-2016
© 2014 Dialog Semiconductor