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DR80390_1 Datasheet, PDF (2/8 Pages) Digital Core Design – High Performance 8-bit Microcontroller ver 3.10
● Fully synthesizable, static synchronous de-
sign with positive edge clocking and no in-
ternal tri-states
● Scan test ready
● 1.3 GHz virtual clock frequency in a 0.35u
technological process
PERIPHERALS
● DoCD™ debug unit
○ Processor execution control
○ Run
○ Halt
○ Step into instruction
○ Skip instruction
○ Read-write all processor contents
○ Program Counter (PC)
○ Program Memory
○ Internal (direct) Data Memory
○ Special Function Registers (SFRs)
○ External Data Memory
○ Hardware execution breakpoints
○ Program Memory
○ Internal (direct) Data Memory
○ Special Function Registers (SFRs)
○ External Data Memory
○ Hardware breakpoints activated at a certain
○ Program address (PC)
○ Address by any write into memory
○ Address by any read from memory
○ Address by write into memory a required data
○ Address by read from memory a required data
○ Three wire communication interface
● Power Management Unit
○ Power management mode
○ Switchback feature
○ Stop mode
● Interrupt Controller
○ 2 priority levels
○ 2 external interrupt sources
○ 3 interrupt sources from peripherals
● Four 8-bit I/O Ports
○ Bit addressable data direction for each line
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are trademarks of their respective owners.
○ Read/write of single line and 8-bit group
● Two 16-bit timer/counters
○ Timers clocked by internal source
○ Auto reload 8-bit timers
○ Externally gated event counters
● Full-duplex serial port
○ Synchronous mode, fixed baud rate
○ 8-bit asynchronous mode, fixed baud rate
○ 9-bit asynchronous mode, fixed baud rate
○ 9-bit asynchronous mode, variable baud rate
CONFIGURATION
The following parameters of the DR80390 core
can be easy adjusted to requirements of dedi-
cated application and technology. Configura-
tion of the core can be prepared by effortless
changing appropriate constants in package file.
There is no need to change any parts of the
code.
• Memory style
- Harward
- von Neumann
• Program Memory type
- synchronous
- asynchronous
•
Program
states
Memory
wait-
- used (0-7)
- unused
• Program Memory writes
- used
- unused
• Internal Data Memory type
- synchronous
- asynchronous
•
External Data
wait-states
Memory
- used (0-7)
- unused
• Interrupts
-
subroutines
location
• Power Management Mode
- used
- unused
• Stop mode
- used
- unused
• DoCD debug unit
- used
- unused
Besides mentioned above parameters all
available peripherals and external interrupts
can be excluded from the core by changing
appropriate constants in package file.
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