DFP2INT Datasheet, PDF (2/3 Pages) Digital Core Design – Floating Point To Integer Pipelined Converter

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SYMBOL
datai(31:0)
en
rst
clk
datao(31:0)
ofo
ufo
ifo
BLOCK DIAGRAM
datai(31:0)
en
rst
clk
Argument
Checker
Main FP
Pipelined Unit
Result
Composer
datao(31:0)
ofo
ufo
ifo
Arguments Checker - performs input data
analyze against IEEE-754 number standard
compliance. The appropriate numbers and
information about the input data classes are
given as the results to Main FP Pipelined
Unit.
Main FP Pipelined Unit - performs floating
point to integer conversion. Gives the com-
plex information about the results to Result
Composer module.
Result Composer - performs result rounding
function, data alignment to IEEE-754 stan-
dard, and the final flags setting.
PINS DESCRIPTION
PIN
clk
rst
en
datai[31:0]
datao[31:0]
ofo
ufo
ifo
TYPE
DESCRIPTION
Input Global system clock
Input Global system reset
Input Enable computing
Input Data bus input
Output Data bus output
Output Overflow flag
Output Underflow flag
Output Invalid result flag
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