3D3424 Datasheet, PDF (6/6 Pages) Data Delay Devices, Inc. – MONOLITHIC QUAD 4-BIT PROGRAMMABLE DELAY LINE

3D3424
SILICON DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT:
Ambient Temperature: 25^oC ± 3^oC
Supply Voltage (VDD): 5.0V ± 0.1V
Input Pulse:
High = 3.3V ± 0.1V
Low = 0.0V ± 0.1V
Source Impedance: 50Ω Max.
Rise/Fall Time:
3.0 ns Max. (measured
between 0.6V and 2.7V )
Pulse Width:
Period:
PW_IN = 1.25 x Total Delay
PER_IN = 2.5 x Total Delay
OUTPUT:
R_load:
C_load:
Threshold:
10KΩ ± 10%
5pf ± 10%
1.65V (Rising & Falling)
Device
Under
Test
10KΩ
470Ω
Digital
Scope
5pf
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
COMPUTER
SYSTEM
PRINTER
PULSE
GENERATOR
OUT
TRIG
IN1 _{DEVICE UNDER}
IN2 _{TEST (DUT)}
IN3
IN4
OUT1
OUT2
OUT3
OUT4
REF
IN
DIGITAL SCOPE/
TRIG ^{TIME INTERVAL COUNTER}
Figure 4: Test Setup
t_RISE
PW_IN
PER_IN
t_FALL
INPUT
2.7V
V_IH
2.7V
SIGNAL
1.65V
0.6V
1.65V
0.6V
V_IL
t_PLH
t_PHL
OUTPUT
SIGNAL
V_OH
1.65V
1.65V
V_OL
Figure 5: Timing Diagram
Doc #06020
DATA DELAY DEVICES, INC.
6
6/6/2006
Tel: [phone] Fax: [phone] http://www.datadelay.com