DS1337 Datasheet, PDF (8/13 Pages) Dallas Semiconductor – Serial Real-Time Clock

DS1337
CLOCK AND CALENDAR
The time and calendar information is obtained by reading the appropriate register bytes. The RTC
registers are illustrated in Table 1. The time and calendar are set or initialized by writing the appropriate
register bytes. The contents of the time and calendar registers are in the binary-coded decimal (BCD)
format.
The day-of-week register increments at midnight. Values that correspond to the day of week are user-
defined but must be sequential (i.e., if 1 equals Sunday, then 2 equals Monday, and so on.). Illogical time
and date entries result in undefined operation.
When reading or writing the time and date registers, secondary (user) buffers are used to prevent errors
when the internal registers update. When reading the time and date registers, the user buffers are
synchronized to the internal registers on any start or stop and when the register pointer rolls over to zero.
The countdown chain is reset whenever the seconds register is written. Write transfers occur on the
acknowledge pulse from the device. To avoid rollover issues, once the countdown chain is reset, the
remaining time and date registers must be written within 1 second. The 1Hz square-wave output, if
enable, transitions high 500ms after the seconds data transfer, provided the oscillator is already running.
The DS1337 can be run in either 12-hour or 24-hour mode. Bit 6 of the hours register is defined as the
12- or 24-hour mode-select bit. When high, the 12-hour mode is selected. In the 12-hour mode, bit 5 is
the AM/PM bit with logic high being PM. In the 24-hour mode, bit 5 is the second 10-hour bit (20–23
hours). The century bit (bit 7 of the month register) is toggled when the years register overflows from
99–00.
ALARMS
The DS1337 contains two time-of-day/date alarms. Alarm 1 can be set by writing to registers 07h–0Ah.
Alarm 2 can be set by writing to registers 0Bh–0Dh. The alarms can be programmed (by the INTCN bit
of the control register) to operate in two different modes—each alarm can drive its own separate interrupt
output or both alarms can drive a common interrupt output. Bit 7 of each of the time-of-day/date alarm
registers are mask bits (Table 2). When all of the mask bits for each alarm are logic 0, an alarm only
occurs when the values in the timekeeping registers 00h–06h match the values stored in the time-of-
day/date alarm registers. The alarms can also be programmed to repeat every second, minute, hour, day,
or date. Table 2 shows the possible settings. Configurations not listed in the table result in illogical
operation.
The DY/DT bits (bit 6 of the alarm day/date registers) control whether the alarm value stored in bits 0–5
of that register reflects the day of the week or the date of the month. If DY/DT is written to logic 0, the
alarm is the result of a match with date of the month. If DY/DT is written to logic 1, the alarm is the
result of a match with day of the week.
When the RTC register values match alarm register settings, the corresponding alarm flag (A1F or A2F)
bit is set to logic 1. If the corresponding alarm interrupt enable (A1IE or A2IE) is also set to logic 1, the
alarm condition activates one of the interrupt output (INTA or SQW/INTB) signals. The match is tested
on the once-per-second update of the time and date registers.
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