DS1337 Datasheet, PDF (7/13 Pages) Dallas Semiconductor – Serial Real-Time Clock

DS1337
CLOCK ACCURACY
The accuracy of the clock is dependent upon the accuracy of the crystal and the accuracy of the match
between the capacitive load of the oscillator circuit and the capacitive load for which the crystal was
trimmed. Crystal frequency drift caused by temperature shifts creates additional error. External circuit
noise coupled into the oscillator circuit can result in the clock running fast. Refer to Application Note 58:
Crystal Considerations with Dallas Real-Time Clocks for detailed information.
ADDRESS MAP
The address map for the registers of the DS1337 is shown in Table 1. During a multibyte access, when
the address pointer reaches the end of the register space (0Fh) it wraps around to location 00h. On a 2-
wire START, STOP, or address pointer incrementing to location 00h, the current time is transferred to a
second set of registers. The time information is read from these secondary registers, while the clock may
continue to run. This eliminates the need to re-read the registers in case of an update of the main registers
during a read.
Table 1. Timekeeper Registers
ADDRESS
00H
01H
02H
BIT 7
0
0
0
BIT 6
12/24
BIT 5
10 Seconds
10 Minutes
AM/PM
10hr
BIT 4
10hr
03H
0
0
04H
0
0
05H
Century
0
0
0
10 Date
0
10 Mo
06H
10 Year
07H
A1M1
10 Seconds
08H
A1M2
10 Minutes
AM/PM
09H
A1M3
12/24
10hr
10hr
0AH
A1M4
DY/DT
10 DATE
0BH
A2M2
10 Minutes
AM/PM
0CH
A2M3
12/24
10hr
10hr
0DH
A2M4
DY/DT
10 Date
0EH
EOSC
0
0FH
OSF
0
0
RS2
0
0
BIT 3
0
BIT 2 BIT 1
Seconds
Minutes
Hour
Day
Date
Month
Year
Seconds
Minutes
Hour
Day
Date
Minutes
Hour
Day
Date
RS1
INTCN A2IE
0
0
A2F
BIT 0
A1IE
A1F
FUNCTION
Seconds
Minutes
Hours
Day
Date
Month/
Century
Year
Alarm 1
Seconds
Alarm 1
Minutes
Alarm 1
Hours
Alarm 1
Day
Alarm 1
Date
Alarm 2
Minutes
Alarm 2
Hours
Alarm 2
Day
Alarm 2
Date
Control
Status
RANGE
00-59
00-59
1-12
+AM/PM
00-23
1-7
00-31
01-12 +
Century
00-99
00-59
00-59
1-12 +
AM/PM
00-23
1-7
1-31
00-59
1-12 +
AM/PM
00-23
1-7
1-31
Note: Unless otherwise specified, the state of the registers is not defined when power is first applied or VCC falls below the VOSC.
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