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DS1110 Datasheet, PDF (7/8 Pages) Dallas Semiconductor – 10-Tap Silicon Delay Line
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10-Tap Silicon Delay Line
between the input and each tap. Each tap is selected
and connected to the counter by a VHF switch-control
unit. All measurements are fully automated, with each
instrument controlled by a central computer over an
IEEE-488 bus.
Output
Each output is loaded with the equivalent of one 74FO4
input gate. Delay is measured at the 1.5V level on the
rising and falling edge.
Chip Information
TRANSISTOR COUNT: 6813
Table 2. Test Conditions
INPUT
CONDITION
Ambient Temperature
+25°C ±3°C
Supply Voltage (VCC)
Input Pulse
Source Impedance
5.0V ±0.1V
High = 3.0V ±0.1V
Low = 0.0V ±0.1V
50Ω max
Rise and Fall Time
3ns max
Pulse Width
500ns (1µs for -500ns)
Period
1µs (2µs for -500ns)
Note: The above conditions are for test only and do not restrict
the operation of the device under other data sheet conditions.
PART
TEMP RANGE
DS1110E-50
DS1110E-60
DS1110E-75
DS1110E-80
DS1110E-100
DS1110E-125
DS1110E-150
DS1110E-175
DS1110E-200
DS1110E-250
DS1110E-300
DS1110E-350
DS1110E-400
DS1110E-450
DS1110E-500
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-
PACKAGE
14 TSSOP
14 TSSOP
14 TSSOP
14 TSSOP
14 TSSOP
14 TSSOP
14 TSSOP
14 TSSOP
14 TSSOP
14 TSSOP
14 TSSOP
14 TSSOP
14 TSSOP
14 TSSOP
14 TSSOP
TOTAL
DELAY
(ns)*
50
60
75
80
100
125
150
175
200
250
300
350
400
450
500
Selector Guide
PART
TEMP RANGE
DS1110S-50
DS1110S-60
DS1110S-75
DS1110S-80
DS1110S-100
DS1110S-125
DS1110S-150
DS1110S-175
DS1110S-200
DS1110S-250
DS1110S-300
DS1110S-350
DS1110S-400
DS1110S-450
DS1110S-500
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
*Custom delays are available.
PIN-
PACKAGE
16 SO
16 SO
16 SO
16 SO
16 SO
16 SO
16 SO
16 SO
16 SO
16 SO
16 SO
16 SO
16 SO
16 SO
16 SO
TOTAL
DELAY
(ns)*
50
60
75
80
100
125
150
175
200
250
300
350
400
450
500
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