DS2196 Datasheet, PDF (60/157 Pages) Dallas Semiconductor – T1 Dual Framer LIU

SR2A: STATUS REGISTER 2 FRAMER A (Address = 21 Hex)
DS2196
(MSB)
RMF
TMF
(LSB)
SEC
RFDL
TFDL RMTCH
RAF
–
SYMBOL
POSITION NAME AND DESCRIPTION
RMF
TMF
SEC
RFDL
TFDL
RMTCH
RAF
–
SR2A.7
SR2A.6
SR2A.5
SR2A.4
SR2A.3
SR2A.2
SR2A.1
SR2A.0
Receive Multiframe. Set on receive multiframe boundaries.
Transmit Multiframe. Set on transmit multiframe boundaries.
One Second Timer. Set on increments of one second based on
RCLK; will be set in increments of 999 ms, 999 ms, and 1002
ms every 3 seconds. Set on increments of 42 ms (333 frames) if
CCR3A.2 = 1.
Receive FDL Buffer Full. Set when the receive FDL buffer
(RFDL) fills to capacity (8 bits).
Transmit FDL Buffer Empty. Set when the transmit FDL
buffer (TFDL) empties.
Receive FDL Match Occurrence. Set when the RFDL
matches either RMTCH1A or RMTCH2A.
Receive FDL Abort. Set when eight consecutive 1’s’s are
received in the FDL.
Not Assigned. Could be any value when read.
SR2B: STATUS REGISTER 2 FRAMER B (Address = C1 Hex)
(MSB)
RMF
TMF
(LSB)
SEC
RFDL
TFDL RMTCH
RAF
–
SYMBOL
POSITION NAME AND DESCRIPTION
RMF
TMF
SEC
RFDL
TFDL
RMTCH
RAF
–
SR2B.7
SR2B.6
SR2B.5
SR2B.4
SR2B.3
SR2B.2
SR2B.1
SR2B.0
Receive Multiframe. Set on receive multiframe boundaries.
Transmit Multiframe. Set on transmit multiframe boundaries.
One Second Timer. Set on increments of one second based on
RCLK; will be set in increments of 999 ms, 999 ms, and 1002
ms every 3 seconds. Set on increments of 42 ms (333 frames) if
CCR3B.2 = 1.
Receive FDL Buffer Full. Set when the receive FDL buffer
(RFDL) fills to capacity (8 bits).
Transmit FDL Buffer Empty. Set when the transmit FDL
buffer (TFDL) empties.
Receive FDL Match Occurrence. Set when the RFDL
matches either RMTCH1B or RMTCH2B.
Receive FDL Abort. Set when eight consecutive 1’s’s are
received in the FDL.
Not Assigned. Could be any value when read.
60 of 157