DS1672 Datasheet, PDF (6/13 Pages) Dallas Semiconductor – Low Voltage Serial Timekeeping Chip

DATA TRANSFER ON 2-WIRE SERIAL BUS Figure 4
DS1672
SDA
SCL
START
CONDITION
MSB
1
slave address
2
6
R/W
direction
bit
acknowledgement
signal from receiver
7
8
9
1
ACK
acknowledgement
signal from receiver
2
3-8
8
9
ACK
repeated if more bytes
are transferred
STOP CONDITION
OR
REPEATED
START CONDITION
Figures 5 and 6 detail how data transfer is accomplished on the 2-wire bus. Depending upon the state of
the R/ W bit, two types of data transfer are possible:
1. Data transfer from a master transmitter to a slave receiver. The first byte transmitted by the
master is the slave address. Next follows a number of data bytes. The slave returns an acknowledge
bit after each received byte.
2. Data transfer from a slave transmitter to a master receiver. The first byte (the slave address) is
transmitted by the master. The slave then returns an acknowledge bit. Next follows a number of data
bytes transmitted by the slave to the master. The master returns an acknowledge bit after all received
bytes other than the last byte. At the end of the last received byte, a ‘not acknowledge’ is returned.
The master device generates all of the serial clock pulses and the START and STOP conditions. A
transfer is ended with a STOP condition or with a repeated START condition. Since a repeated START
condition is also the beginning of the next serial transfer, the bus will not be released.
The DS1672 may operate in the following two modes:
1. Slave receiver mode (DS1672 write mode): Serial data and clock are received through SDA and
SCL. After each byte is received, an acknowledge bit is transmitted. START and STOP conditions
are recognized as the beginning and end of a serial transfer. Address recognition is performed by
hardware after reception of the slave address and direction bit. The address byte is the first byte
received after the START condition is generated by the master. The address byte contains the 7-bit
DS1672 address, which is 1101000, followed by the direction bit (R/ W ), which for a write is a 0.
After receiving and decoding the address byte the DS1672 outputs an acknowledge on the SDA line.
After the DS1672 acknowledges the slave address + write bit, the master transmits a register address
to the DS1672. This will set the register pointer on the DS1672. The master will then begin
transmitting each byte of data with the DS1672 acknowledging each byte received. The master will
generate a STOP condition to terminate the data write.
2. Slave transmitter mode (DS1672 read mode): The first byte is received and handled as in the slave
receiver mode. However, in this mode, the direction bit will indicate that the transfer direction is
reversed. Serial data is transmitted on SDA by the DS1672 while the serial clock is input on SCL.
START and STOP conditions are recognized as the beginning and end of a serial transfer. Address
recognition is performed by hardware after reception of the slave address and direction bit. The
address byte is the first byte received after the START condition is generated by the master. The
address byte contains the 7-bit DS1672 address, which is 1101000, followed by the direction bit
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