DS1644P Datasheet, PDF (6/13 Pages) Dallas Semiconductor – Nonvolatile Timekeeping RAM

DS1644/DS1644P
DATA RETENTION MODE
When V_CC is within nominal limits (V_CC > 4.5 volts) the DS1644 can be accessed as described above with
read or write cycles. However, when V_CC is below the power-fail point V_PF (point at which write
protection occurs) the internal clock registers and RAM are blocked from access. This is accomplished
internally by inhibiting access via the CE signal. At this time the power-fail output signal ( PFO ) will be
driven active low and will remain active until V_CC returns to nominal levels. When V_CC falls below the
level of the internal battery supply, power input is switched from the V_CC pin to the internal battery and
clock activity, RAM, and clock data are maintained from the battery until V_CC is returned to nominal
level.
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