DS87C520MCL Datasheet, PDF (34/44 Pages) Dallas Semiconductor – EPROM/ROM High-Speed Microcontrollers

DS87C520/DS83C520 EPROM/ROM High-Speed Microcontrollers
EXPLANATION OF AC SYMBOLS
In an effort to remain compatible with the original 8051 family, the DS87C520 and DS83C520 specify
the same parameters as such devices, using the same symbols. For completeness, the following is an
explanation of the symbols.
t Time
A Address
C Clock
D Input data
H Logic level high
L Logic level low
I
Instruction
P
PSEN
Q Output data
R
RD signal
V Valid
W WR signal
X No longer a valid logic
level
Z
Tri-State
POWER-CYCLE TIMING CHARACTERISTICS
PARAMETER
Cycle Startup Time
Power-On Reset Delay
SYMBOL
t_CSU
t_POR
MIN
TYP
1.8
MAX
65,536
UNITS
ms
t_CLCL
NOTES
1
2
Note 1:
Note 2:
Startup time for crystals varies with load capacitance and manufacturer. Time shown is for an 11.0592MHz crystal
manufactured by Fox.
Reset delay is a synchronous counter of crystal oscillations after crystal startup. Counting begins when the level
on the XTAL1 pin meets the VIH2 criteria. At 33MHz, this time is 1.99ms.
EPROM PROGRAMMING AND VERIFICATION
(V_CC = 4.5V to 5.5V, T_A = +21°C to +27°C.)
PARAMETER
SYMBOL MIN
Programming Voltage
Programming Supply Current
Oscillator Frequency
Address Setup to PROG Low
Address Hold after PROG
Data Setup to PROG Low
Data Hold after PROG
Enable High to V_PP
V_PP Setup to PROG Low
V_PP Hold after PROG
PROG Width
Address to Data Valid
Enable Low to Data Valid
Data Float after Enable
PROG High to PROG Low
V_PP
I_PP
1/t_CLCL
t_AVGL
t_GHAX
t_DVGL
t_GHDX
t_EHSH
t_SHGL
t_SHGL
t_GLGH
t_AVQV
t_ELQV
t_EHQZ
t_GHGL
12.5
4
48t_CLCL
48 t_CLCL
48 t_CLCL
48 t_CLCL
48 t_CLCL
10
10
90
0
10
Note 1: All voltages are referenced to ground.
TYP
MAX
13.0
50
6
UNITS
V
mA
MHz
NOTES
1
µs
µs
110
µs
48 t_CLCL
48 t_CLCL
48 t_CLCL
µs
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