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DS87C520MCL Datasheet, PDF (32/44 Pages) Dallas Semiconductor – EPROM/ROM High-Speed Microcontrollers
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DS87C520/DS83C520 EPROM/ROM High-Speed Microcontrollers
MOVX CHARACTERISTICS
PARAMETER
SYMBOL
Data Access ALE Pulse Width
tLHLL2
Port 0 Address Valid to ALE Low
Address Hold after ALE Low for
MOVX Write
RD Pulse Width
tAVLL2
tLLAX2
tRLRH
WR Pulse Width
RD Low to Valid Data In
Data Hold After Read
Data Float after Read
tWLWH
tRLDV
tRHDX
tRHDZ
ALE Low to Valid Data In
tLLDV
Port 0 Address to Valid Data In
tAVDV1
VARIABLE CLOCK
MIN
MAX
1.5tCLCL-5
2tCLCL-5
0.5tCLCL-5
tCLCL-5
0.5tCLCL-10
tCLCL-7
2tCLCL-5
tMCS-10
2tCLCL-5
tMCS-10
2tCLCL-22
tMCS-24
0
tCLCL-5
2tCLCL-5
2.5tCLCL-31
tMCS+tCLCL-26
3tCLCL-29
tMCS+2tCLCL-
29
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
STRETCH
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
—
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
Port 2 Address to Valid Data In
tAVDV2
3.5tCLCL-37
ns
tMCS+2.5tCLCL-
37
ALE Low to RD or WR Low
tLLWL
0.5tCLCL-10
tCLCL-5
0.5tCLCL+5
tCLCL+5
ns
Port 0 Address to RD or WR Low
tAVWL1
tCLCL-9
2tCLCL-7
ns
Port 2 Address to RD or WR Low
tAVWL2
1.5tCLCL-17
2.5tCLCL-16
ns
Data Valid to WR Transition
tQVWX
-6
ns
Data Hold after Write
RD Low to Address Float
tWHQX
tCLCL-5
2tCLCL-6
ns
tRLAZ
(Note 1)
ns
RD or WR High to ALE High
tWHLH
-4
tCLCL-5
10
tCLCL+5
ns
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
—
tMCS=0
tMCS>0
—
tMCS=0
tMCS>0
Note 1: tMCS is a time period related to the Stretch memory cycle selection. The following table shows the value of tMCS for
each Stretch selection.
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